Searched refs:SCDesc (Results 1 - 12 of 12) sorted by relevance

/freebsd-current/contrib/llvm-project/llvm/lib/MC/
H A DMCSchedule.cpp43 const MCSchedClassDesc &SCDesc) {
45 for (unsigned DefIdx = 0, DefEnd = SCDesc.NumWriteLatencyEntries;
49 STI.getWriteLatencyEntry(&SCDesc, DefIdx);
60 const MCSchedClassDesc &SCDesc = *getSchedClassDesc(SchedClass); local
61 if (!SCDesc.isValid())
63 if (!SCDesc.isVariant())
64 return MCSchedModel::computeInstrLatency(STI, SCDesc);
73 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); local
74 if (!SCDesc->isValid())
78 while (SCDesc
42 computeInstrLatency(const MCSubtargetInfo &STI, const MCSchedClassDesc &SCDesc) argument
90 getReciprocalThroughput(const MCSubtargetInfo &STI, const MCSchedClassDesc &SCDesc) argument
116 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); local
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetSchedule.cpp124 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass); local
125 if (!SCDesc->isValid())
126 return SCDesc;
131 while (SCDesc->isVariant()) {
135 SCDesc = SchedModel.getSchedClassDesc(SchedClass);
137 return SCDesc;
201 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); local
203 if (DefIdx < SCDesc->NumWriteLatencyEntries) {
206 STI->getWriteLatencyEntry(SCDesc, DefIdx);
225 if (SCDesc
266 const MCSchedClassDesc *SCDesc = resolveSchedClass(MI); local
296 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); local
329 const MCSchedClassDesc &SCDesc = *SchedModel.getSchedClassDesc(SchedClass); local
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H A DMachinePipeliner.cpp1086 const MCSchedClassDesc *SCDesc = local
1088 if (!SCDesc->isValid())
1094 make_range(STI->getWriteProcResBegin(SCDesc),
1095 STI->getWriteProcResEnd(SCDesc))) {
1129 const MCSchedClassDesc *SCDesc = local
1131 if (!SCDesc->isValid())
1137 make_range(STI->getWriteProcResBegin(SCDesc),
1138 STI->getWriteProcResEnd(SCDesc))) {
3489 const MCSchedClassDesc *SCDesc = DAG->getSchedClass(&SU); local
3490 if (!SCDesc
3515 const MCSchedClassDesc *SCDesc = DAG->getSchedClass(&SU); local
3534 reserveResources(const MCSchedClassDesc *SCDesc, int Cycle) argument
3546 unreserveResources(const MCSchedClassDesc *SCDesc, int Cycle) argument
3648 const MCSchedClassDesc *SCDesc = DAG->getSchedClass(&SU); local
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64StorePairSuppress.cpp87 const MCSchedClassDesc *SCDesc = local
91 if (SCDesc->isValid() && !SCDesc->isVariant()) {
92 unsigned ResLenWithSTP = BBTrace.getResourceLength(std::nullopt, SCDesc);
H A DAArch64SIMDInstrOpt.cpp230 const MCSchedClassDesc *SCDesc = local
236 if (!SCDesc->isValid() || SCDesc->isVariant())
/freebsd-current/contrib/llvm-project/llvm/tools/llvm-mca/Views/
H A DInstructionInfoView.cpp134 const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);
135 IIVDEntry.NumMicroOpcodes = SCDesc.NumMicroOps;
136 IIVDEntry.Latency = MCSchedModel::computeInstrLatency(STI, SCDesc);
139 STI.getReadAdvanceEntries(SCDesc));
140 IIVDEntry.RThroughput = MCSchedModel::getReciprocalThroughput(STI, SCDesc);
/freebsd-current/contrib/llvm-project/llvm/lib/MCA/
H A DInstrBuilder.cpp43 const MCSchedClassDesc &SCDesc,
69 for (unsigned I = 0, E = SCDesc.NumWriteProcResEntries; I < E; ++I) {
70 const MCWriteProcResEntry *PRE = STI.getWriteProcResBegin(&SCDesc) + I;
77 WithColor::note() << "found in scheduling class " << SCDesc.Name
222 const MCSchedClassDesc &SCDesc,
231 int Latency = MCSchedModel::computeInstrLatency(STI, SCDesc);
269 const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);
316 unsigned NumWriteLatencyEntries = SCDesc.NumWriteLatencyEntries;
343 *STI.getWriteLatencyEntry(&SCDesc, CurrentDef);
371 *STI.getWriteLatencyEntry(&SCDesc, Inde
42 initializeUsedResources(InstrDesc &ID, const MCSchedClassDesc &SCDesc, const MCSubtargetInfo &STI, ArrayRef<uint64_t> ProcResourceMasks) argument
221 computeMaxLatency(InstrDesc &ID, const MCInstrDesc &MCDesc, const MCSchedClassDesc &SCDesc, const MCSubtargetInfo &STI) argument
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/freebsd-current/contrib/llvm-project/llvm/lib/MC/MCDisassembler/
H A DDisassembler.cpp210 const MCSchedClassDesc *SCDesc = SCModel.getSchedClassDesc(SCClass); local
213 if (!SCDesc || !SCDesc->isValid() || SCDesc->isVariant())
218 for (unsigned DefIdx = 0, DefEnd = SCDesc->NumWriteLatencyEntries;
221 const MCWriteLatencyEntry *WLEntry = STI->getWriteLatencyEntry(SCDesc,
/freebsd-current/contrib/llvm-project/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp1041 MCSchedClassDesc &SCDesc = SCTab.back(); local
1042 // SCDesc.Name is guarded by NDEBUG
1043 SCDesc.NumMicroOps = 0;
1044 SCDesc.BeginGroup = false;
1045 SCDesc.EndGroup = false;
1046 SCDesc.RetireOOO = false;
1047 SCDesc.WriteProcResIdx = 0;
1048 SCDesc.WriteLatencyIdx = 0;
1049 SCDesc.ReadAdvanceIdx = 0;
1061 SCDesc
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/freebsd-current/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCSchedule.h369 const MCSchedClassDesc &SCDesc);
378 const MCSchedClassDesc &SCDesc);
/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetSchedule.h46 unsigned computeInstrLatency(const MCSchedClassDesc &SCDesc) const;
H A DMachinePipeliner.h476 void reserveResources(const MCSchedClassDesc *SCDesc, int Cycle);
478 void unreserveResources(const MCSchedClassDesc *SCDesc, int Cycle);

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