| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 76 bool contains(unsigned Reg1, unsigned Reg2) const { argument
77 return contains(Reg1) && contains(Reg2);
475 uint16_t Reg1; member in class:llvm::MCRegUnitRootIterator
480 Reg1 = MCRI->RegUnitRoots[RegUnit][1];
496 Reg0 = Reg1;
497 Reg1 = 0;
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
| H A D | X86InstrBuilder.h | 115 unsigned Reg1, bool isKill1,
117 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1)
114 addRegReg(const MachineInstrBuilder &MIB, unsigned Reg1, bool isKill1, unsigned Reg2, bool isKill2) argument
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| H A D | X86FastISel.cpp | 1488 unsigned Reg1 = getRegForValue(Op1); local
1491 if (Reg1 == 0 || Reg2 == 0)
1507 .addReg(Reg1).addReg(Reg2);
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/ |
| H A D | AggressiveAntiDepBreaker.h | 101 // UnionGroups - Union Reg1's and Reg2's groups to form a new
104 unsigned UnionGroups(unsigned Reg1, unsigned Reg2);
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| H A D | TargetInstrInfoImpl.cpp | 79 unsigned Reg1 = MI->getOperand(Idx1).getReg(); local
88 if (HasDef && Reg0 == Reg1 &&
96 Reg0 = Reg1;
110 MI->getOperand(Idx2).setReg(Reg1);
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| H A D | AggressiveAntiDepBreaker.cpp | 80 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) argument
86 unsigned Group1 = GetGroup(Reg1);
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| H A D | StrongPHIElimination.cpp | 438 void StrongPHIElimination::unionRegs(unsigned Reg1, unsigned Reg2) { argument
439 Node *Node1 = RegNodeMap[Reg1]->getLeader();
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/InstPrinter/ |
| H A D | ARMInstPrinter.cpp | 1091 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1);
1092 O << "{" << getRegisterName(Reg0) << ", " << getRegisterName(Reg1) << "}";
1100 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2);
1101 O << "{" << getRegisterName(Reg0) << ", " << getRegisterName(Reg1) << "}";
1136 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1);
1137 O << "{" << getRegisterName(Reg0) << "[], " << getRegisterName(Reg1) << "[]}";
1168 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2);
1169 O << "{" << getRegisterName(Reg0) << "[], " << getRegisterName(Reg1) << "[]}";
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| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Target/ |
| H A D | TargetRegisterInfo.h | 80 bool contains(unsigned Reg1, unsigned Reg2) const { argument
81 return MC->contains(Reg1, Reg2);
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 600 unsigned Reg1 = MI->getOperand(1).getReg(); local
605 if (!isARMLowRegister(Reg0) || !isARMLowRegister(Reg1)
611 if (Reg1 != Reg0)
618 } else if (Reg0 != Reg1) {
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| H A D | ARMFastISel.cpp | 2663 unsigned Reg1 = getRegForValue(Src1Value); local
2664 if (Reg1 == 0) return false;
2677 .addReg(Reg1);
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| H A D | ARMBaseInstrInfo.cpp | 2341 unsigned Reg1 = UseMI->getOperand(OpIdx).getReg(); local
2347 .addReg(Reg1, getKillRegState(isKill))
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| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 159 unsigned Reg1 = MI->getOperand(1).getReg(); local
166 if (Reg0 == Reg1) {
185 .addReg(Reg1, getKillRegState(Reg1IsKill))
192 MI->getOperand(2).setReg(Reg1);
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| /macosx-10.9.5/llvmCore-3425.0.33/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 1143 CodeGenRegister *Reg1 = Registers[i]; local
1146 if (TopoSigs.test(Reg1->getTopoSig()))
1148 TopoSigs.set(Reg1->getTopoSig());
1150 const CodeGenRegister::SubRegMap &SRM1 = Reg1->getSubRegs();
1156 if (Reg1 == Reg2)
1167 // OK Reg1:IdxPair == Reg3. Find the index with Reg:Idx == Reg3.
1168 CodeGenSubRegIndex *Idx3 = Reg1->getSubRegIndex(Reg3);
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