Searched refs:Off1 (Results 1 - 5 of 5) sorted by relevance
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64MachineScheduler.cpp | 37 int64_t &Off0, int64_t &Off1) { 50 Off1 = AArch64InstrInfo::hasUnscaledLdStOffset(MI1.getOpcode()) 54 const MachineInstr &MI = (Off0 < Off1) ? MI0 : MI1; 58 return llabs(Off0 - Off1) < StoreSize; 72 int64_t Off0, Off1; 74 if (!mayOverlapWrite(*Instr0, *Instr1, Off0, Off1)) { 77 return Off0 < Off1; 36 mayOverlapWrite(const MachineInstr &MI0, const MachineInstr &MI1, int64_t &Off0, int64_t &Off1) argument
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonStoreWidening.cpp | 292 int Off1 = S1->getOperand(1).getImm(); local 295 return (Off1 >= 0) ? Off1+S1MO.getSize() == unsigned(Off2) 296 : int(Off1+S1MO.getSize()) == Off2;
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/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | SimplifyLibCalls.cpp | 865 Value *Off1 = B.getInt32(1); 866 Value *EndPtr = B.CreateInBoundsGEP(CharTy, Dst, Off1, "stpncpy.end");
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.cpp | 335 SDValue Off1 = Load1->getOperand(OffIdx1); 338 if (!isa<ConstantSDNode>(Off0) || !isa<ConstantSDNode>(Off1)) 342 Offset1 = Off1->getAsZExtVal();
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 7633 unsigned Off1 = rev ? 0 : NumElts / 2; local 7637 if (M[i + 1] >= 0 && M[i + 1] != (int)(Off1 + i / 2)) 16660 unsigned Off1 = Rev ? 0 : NumElts; 16665 if (M[I + 1] >= 0 && M[I + 1] != (int)(Off1 + I / 2))
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