/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86EncodingOptimization.h | 17 class MCInstrDesc; 19 bool optimizeInstFromVEX3ToVEX2(MCInst &MI, const MCInstrDesc &Desc);
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/freebsd-current/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCInstrInfo.h | 17 #include "llvm/MC/MCInstrDesc.h" 33 const MCInstrDesc *LastDesc; // Raw array to allow static init'n 48 void InitMCInstrInfo(const MCInstrDesc *D, const unsigned *NI, const char *ND, 63 const MCInstrDesc &get(unsigned Opcode) const {
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/freebsd-current/contrib/llvm-project/llvm/lib/MC/ |
H A D | MCInstrDesc.cpp | 1 //===------ llvm/MC/MCInstrDesc.cpp- Instruction Descriptors --------------===// 9 // This file defines methods on the MCOperandInfo and MCInstrDesc classes, which 14 #include "llvm/MC/MCInstrDesc.h" 20 bool MCInstrDesc::mayAffectControlFlow(const MCInst &MI, 32 bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, 40 bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg,
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ReturnThunks.cpp | 37 #include "llvm/MC/MCInstrDesc.h" 81 const MCInstrDesc &CS = ST.getInstrInfo()->get(X86::CS_PREFIX); 82 const MCInstrDesc &JMP = ST.getInstrInfo()->get(X86::TAILJMPd);
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.h | 25 class MCInstrDesc; 52 const MCInstrDesc &II, 67 const MCInstrDesc *II, 78 const MCInstrDesc *II, 111 const MCInstrDesc &DbgValDesc,
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/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | MachineInstrBuilder.h | 38 class MCInstrDesc; 364 const MCInstrDesc &MCID) { 372 const MCInstrDesc &MCID, Register DestReg) { 384 const MCInstrDesc &MCID, Register DestReg) { 402 const MCInstrDesc &MCID, Register DestReg) { 413 const MCInstrDesc &MCID, Register DestReg) { 424 const MCInstrDesc &MCID, Register DestReg) { 434 const MCInstrDesc &MCID) { 444 const MCInstrDesc &MCID) { 453 const MCInstrDesc [all...] |
H A D | DFAPacketizer.h | 45 class MCInstrDesc; 101 // Check if the resources occupied by a MCInstrDesc are available in 103 bool canReserveResources(const MCInstrDesc *MID); 105 // Reserve the resources occupied by a MCInstrDesc and change the current 107 void reserveResources(const MCInstrDesc *MID);
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrBuilder.h | 29 const MCInstrDesc &MCID = MI->getDesc();
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCHazardRecognizers.cpp | 29 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); 39 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); 55 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); 65 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); 85 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, 147 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); 175 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); 282 const MCInstrDesc &MCID = DAG.TII->get(Opcode);
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H A D | PPCHazardRecognizers.h | 32 bool mustComeFirst(const MCInstrDesc *MCID, unsigned &NSlots);
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H A D | PPCExpandAtomicPseudoInsts.cpp | 55 const MCInstrDesc &OR = TII->get(PPC::OR8); 56 const MCInstrDesc &XOR = TII->get(PPC::XOR8); 122 const MCInstrDesc &LL = TII->get(PPC::LQARX); 123 const MCInstrDesc &SC = TII->get(PPC::STQCX); 223 const MCInstrDesc &LL = TII->get(PPC::LQARX); 224 const MCInstrDesc &SC = TII->get(PPC::STQCX);
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kInstrBuilder.h | 34 #include "llvm/MC/MCInstrDesc.h" 63 const MCInstrDesc &MCID = MI->getDesc(); 80 const MCInstrDesc &MCID = MI->getDesc();
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H A D | M68kInstrInfo.h | 314 const MCInstrDesc &Desc, MVT MVTDst, MVT MVTSrc) const; 317 bool ExpandPUSH_POP(MachineInstrBuilder &MIB, const MCInstrDesc &Desc, 324 bool ExpandMOVEM(MachineInstrBuilder &MIB, const MCInstrDesc &Desc,
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | Mips16InstrInfo.h | 24 class MCInstrDesc; 100 const MCInstrDesc& AddiuSpImm(int64_t Imm) const;
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H A D | MipsMulMulBugPass.cpp | 127 const MCInstrDesc &NewMCID = MipsII.get(Mips::NOP);
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | DFAPacketizer.cpp | 34 #include "llvm/MC/MCInstrDesc.h" 53 // Check if the resources occupied by a MCInstrDesc are available in the 55 bool DFAPacketizer::canReserveResources(const MCInstrDesc *MID) { 62 // Reserve the resources occupied by a MCInstrDesc and change the current 64 void DFAPacketizer::reserveResources(const MCInstrDesc *MID) { 74 const MCInstrDesc &MID = MI.getDesc(); 81 const MCInstrDesc &MID = MI.getDesc();
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H A D | ScoreboardHazardRecognizer.cpp | 19 #include "llvm/MC/MCInstrDesc.h" 122 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); 177 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCA/ |
H A D | AMDGPUCustomBehaviour.h | 75 bool isVMEM(const MCInstrDesc &MCID);
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
H A D | AMDGPUBaseInfo.h | 571 ComponentProps(const MCInstrDesc &OpDesc); 714 ComponentInfo(const MCInstrDesc &OpDesc, 719 ComponentInfo(const MCInstrDesc &OpDesc, const ComponentProps &OpXProps) 735 InstInfo(const MCInstrDesc &OpX, const MCInstrDesc &OpY) 779 VOPD::InstInfo getVOPDInstInfo(const MCInstrDesc &OpX, const MCInstrDesc &OpY); 1273 bool isSISrcOperand(const MCInstrDesc &Desc, unsigned OpNo); 1276 bool isKImmOperand(const MCInstrDesc &Desc, unsigned OpNo); 1279 bool isSISrcFPOperand(const MCInstrDesc [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVBaseInfo.h | 21 #include "llvm/MC/MCInstrDesc.h" 190 static inline unsigned getVLOpNum(const MCInstrDesc &Desc) { 201 static inline unsigned getSEWOpNum(const MCInstrDesc &Desc) { 210 static inline unsigned getVecPolicyOpNum(const MCInstrDesc &Desc) { 217 static inline int getFRMOpNum(const MCInstrDesc &Desc) { 232 static inline int getVXRMOpNum(const MCInstrDesc &Desc) { 248 static inline bool isFirstDefTiedToFirstUse(const MCInstrDesc &Desc) {
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVFoldMasks.cpp | 148 const MCInstrDesc &MCID = TII->get(Opc); 152 const MCInstrDesc &MaskedMCID = TII->get(MI.getOpcode());
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H A D | RISCVDeadRegisterDefinitions.cpp | 64 const MCInstrDesc &Desc = MI.getDesc();
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMHazardRecognizer.cpp | 31 const MCInstrDesc &MCID = MI->getDesc(); 52 const MCInstrDesc &MCID = MI->getDesc(); 55 const MCInstrDesc &LastMCID = LastMI->getDesc();
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 170 const MCInstrDesc &Desc = MCII->get(MI.getOpcode()); 176 const MCInstrDesc &Desc = MCII->get(MI.getOpcode()); 186 uint64_t ARM_MC::evaluateBranchTarget(const MCInstrDesc &InstDesc, 419 const MCInstrDesc &Desc = Info->get(Inst.getOpcode()); 442 evaluateMemOpAddrForAddrMode_i12(const MCInst &Inst, const MCInstrDesc &Desc, 460 evaluateMemOpAddrForAddrMode3(const MCInst &Inst, const MCInstrDesc &Desc, 480 evaluateMemOpAddrForAddrMode5(const MCInst &Inst, const MCInstrDesc &Desc, 499 evaluateMemOpAddrForAddrMode5FP16(const MCInst &Inst, const MCInstrDesc &Desc, 519 evaluateMemOpAddrForAddrModeT2_i8s4(const MCInst &Inst, const MCInstrDesc &Desc, 540 evaluateMemOpAddrForAddrModeT2_pc(const MCInst &Inst, const MCInstrDesc [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/Target/SPIRV/MCTargetDesc/ |
H A D | SPIRVInstPrinter.cpp | 119 const MCInstrDesc &MCDesc = MII.get(OpCode); 226 const MCInstrDesc &MCDesc = MII.get(MI->getOpcode()); 241 const MCInstrDesc &MCDesc = MII.get(MI->getOpcode());
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