Searched refs:Codes (Results 1 - 8 of 8) sorted by relevance

/freebsd-current/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/
H A DDWARFDebugAbbrev.cpp47 // Codes are not consecutive, can't do O(1) lookups.
78 std::vector<uint32_t> Codes; local
79 Codes.reserve(Decls.size());
81 Codes.push_back(Decl.getCode());
87 for (auto Current = Codes.begin(), End = Codes.end(); Current != End;) {
/freebsd-current/contrib/llvm-project/llvm/lib/IR/
H A DInlineAsm.cpp83 ConstraintCodeVector *pCodes = &Codes;
89 pCodes = &multipleAlternatives[0].Codes;
195 pCodes = &multipleAlternatives[multipleAlternativeIndex].Codes;
230 Codes = scInfo.Codes;
/freebsd-current/contrib/llvm-project/llvm/include/llvm/IR/
H A DInlineAsm.h113 ConstraintCodeVector Codes; member in struct:llvm::final::SubConstraintInfo
154 ConstraintCodeVector Codes; member in struct:llvm::final::ConstraintInfo
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp138 assert(!OpInfo.Codes.empty() && "Must have at least one constraint");
141 if (OpInfo.Codes.size() == 1) {
142 OpInfo.ConstraintCode = OpInfo.Codes[0];
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineFunctionInfo.cpp762 for (StringRef Code : CI.Codes) {
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp5823 rCodes = &info.Codes;
5825 rCodes = &info.multipleAlternatives[maIndex].Codes;
5916 Ret.reserve(OpInfo.Codes.size());
5917 for (StringRef Code : OpInfo.Codes) {
5965 assert(!OpInfo.Codes.empty() && "Must have at least one constraint");
5968 if (OpInfo.Codes.size() == 1) {
5969 OpInfo.ConstraintCode = OpInfo.Codes[0];
H A DSelectionDAGBuilder.cpp8990 for (const auto &Code : Codes)
/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp[all...]

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