/freebsd-current/contrib/llvm-project/llvm/include/llvm/ADT/ |
H A D | APSInt.h | 151 APSInt operator>>(unsigned Amt) const { 152 return IsUnsigned ? APSInt(lshr(Amt), true) : APSInt(ashr(Amt), false); 154 APSInt &operator>>=(unsigned Amt) { argument 156 lshrInPlace(Amt); 158 ashrInPlace(Amt); 161 APSInt relativeShr(unsigned Amt) const { 162 return IsUnsigned ? APSInt(relativeLShr(Amt), true) 163 : APSInt(relativeAShr(Amt), false); 213 APSInt &operator<<=(unsigned Amt) { argument [all...] |
H A D | APFixedPoint.h | 198 APFixedPoint shl(unsigned Amt, bool *Overflow = nullptr) const; 199 APFixedPoint shr(unsigned Amt, bool *Overflow = nullptr) const { argument 203 return APFixedPoint(Val >> Amt, Sema);
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H A D | APInt.h | 995 APInt sshl_ov(const APInt &Amt, bool &Overflow) const; 996 APInt sshl_ov(unsigned Amt, bool &Overflow) const; 997 APInt ushl_ov(const APInt &Amt, bool &Overflow) const; 998 APInt ushl_ov(unsigned Amt, bool &Overflow) const;
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/freebsd-current/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
H A D | BasicValueFactory.cpp | 278 uint64_t Amt = V2.getZExtValue(); 280 if (Amt >= V1.getBitWidth()) 283 return &getValue( V1.operator<<( (unsigned) Amt )); 293 uint64_t Amt = V2.getZExtValue(); 295 if (Amt >= V1.getBitWidth()) 298 return &getValue( V1.operator>>( (unsigned) Amt ));
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/freebsd-current/contrib/llvm-project/clang/lib/AST/ |
H A D | FormatString.cpp | 82 const OptionalAmount &Amt = ParseAmount(I, E); local 84 if (Amt.getHowSpecified() == OptionalAmount::NotSpecified) { 95 assert(Amt.getHowSpecified() == OptionalAmount::Constant); 101 if (Amt.getConstantAmount() == 0) { 109 return OptionalAmount(OptionalAmount::Arg, Amt.getConstantAmount() - 1, 132 const OptionalAmount Amt = local 136 if (Amt.isInvalid()) 138 CS.setFieldWidth(Amt); 151 const OptionalAmount &Amt = ParseAmount(I, E); local 159 if (Amt [all...] |
H A D | ScanfFormatString.cpp | 132 const OptionalAmount &Amt = clang::analyze_format_string::ParseAmount(I, E); local 133 if (Amt.getHowSpecified() != OptionalAmount::NotSpecified) { 134 assert(Amt.getHowSpecified() == OptionalAmount::Constant); 135 FS.setFieldWidth(Amt);
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H A D | PrintfFormatString.cpp | 44 const OptionalAmount Amt = ParsePositionAmount(H, Start, Beg, E, local 46 if (Amt.isInvalid()) 48 FS.setPrecision(Amt);
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/freebsd-current/contrib/llvm-project/clang/include/clang/AST/ |
H A D | FormatString.h | 451 void setVectorNumElts(const OptionalAmount &Amt) { argument 452 VectorNumElts = Amt; 459 void setFieldWidth(const OptionalAmount &Amt) { argument 460 FieldWidth = Amt; 575 void setPrecision(const OptionalAmount &Amt) { argument 576 Precision = Amt;
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCFrameLowering.cpp | 474 unsigned Amt = Old.getOperand(0).getImm(); local 477 if (Amt > AFI->MaxCallStackReq && Old.getOpcode() == ARC::ADJCALLSTACKDOWN) 478 AFI->MaxCallStackReq = Amt; 480 if (Amt != 0) { 485 emitRegUpdate(MBB, I, dl, ARC::SP, Amt, IsAdd, TII);
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 1388 SDValue Amt = N->getOperand(2); local 1389 if (getTypeAction(Amt.getValueType()) == TargetLowering::TypePromoteInteger) 1390 Amt = ZExtPromotedInteger(Amt); 1391 EVT AmtVT = Amt.getValueType(); 1402 Amt = DAG.getNode(ISD::UREM, DL, AmtVT, Amt, 1410 if (NewBits >= (2 * OldBits) && !isa<ConstantSDNode>(Amt) && 1416 Res = DAG.getNode(IsFSHR ? ISD::SRL : ISD::SHL, DL, VT, Res, Amt); 1429 Amt 1438 SDValue Amt = N->getOperand(2); local 2809 ExpandShiftByConstant(SDNode *N, const APInt &Amt, SDValue &Lo, SDValue &Hi) argument 2900 SDValue Amt = N->getOperand(1); local 2987 SDValue Amt = N->getOperand(1); local [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstCombineIntrinsic.cpp | 202 Value *Amt = II.getArgOperand(1); local 205 Type *AmtVT = Amt->getType(); 215 llvm::computeKnownBits(Amt, II.getModule()->getDataLayout()); 217 Amt = Builder.CreateZExtOrTrunc(Amt, SVT); 218 Amt = Builder.CreateVectorSplat(VWidth, Amt); 219 return (LogicalShift ? (ShiftLeft ? Builder.CreateShl(Vec, Amt) 220 : Builder.CreateLShr(Vec, Amt)) 221 : Builder.CreateAShr(Vec, Amt)); 350 Value *Amt = II.getArgOperand(1); local [all...] |
H A D | X86ISelLowering.cpp | 4522 SDValue Amt = DAG.getTargetConstant(EltSizeInBits, dl, MVT::i8); 4525 LHS = DAG.getNode(X86ISD::VSRLI, dl, OpVT, LHS, Amt); 4526 RHS = DAG.getNode(X86ISD::VSRLI, dl, OpVT, RHS, Amt); 4536 LHS = DAG.getNode(X86ISD::VSHLI, dl, OpVT, LHS, Amt); 4537 RHS = DAG.getNode(X86ISD::VSHLI, dl, OpVT, RHS, Amt); 4539 LHS = DAG.getNode(X86ISD::VSRAI, dl, OpVT, LHS, Amt); 4540 RHS = DAG.getNode(X86ISD::VSRAI, dl, OpVT, RHS, Amt); 6720 uint64_t Amt = AmtC->getZExtValue(); 6721 if ((Amt % 8) == 0 && findEltLoadSrc(Elt.getOperand(0), Ld, ByteOffset)) { 6722 ByteOffset += Amt / [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/Support/ |
H A D | APFixedPoint.cpp | 347 APFixedPoint APFixedPoint::shl(unsigned Amt, bool *Overflow) const { argument 359 Amt = std::min(Amt, ThisVal.getBitWidth()); 360 APSInt Result = ThisVal << Amt;
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 4944 LegalizerHelper::narrowScalarShiftByConstant(MachineInstr &MI, const APInt &Amt, argument 4951 if (Amt.isZero()) { 4963 if (Amt.ugt(VTBits)) { 4965 } else if (Amt.ugt(NVTBits)) { 4968 MIRBuilder.buildConstant(AmtTy, Amt - NVTBits)); 4969 } else if (Amt == NVTBits) { 4973 Lo = MIRBuilder.buildShl(NVT, InL, MIRBuilder.buildConstant(AmtTy, Amt)); 4975 MIRBuilder.buildShl(NVT, InH, MIRBuilder.buildConstant(AmtTy, Amt)); 4977 NVT, InL, MIRBuilder.buildConstant(AmtTy, -Amt + NVTBits)); 4981 if (Amt [all...] |
H A D | CombinerHelper.cpp | 4107 Register ShlSrc, ShlAmt, LShrSrc, LShrAmt, Amt; 4124 Amt = LShrAmt; 4127 m_GSub(m_SpecificICstOrSplat(BitWidth), m_Reg(Amt))) && 4128 ShlAmt == Amt) { 4133 m_GSub(m_SpecificICstOrSplat(BitWidth), m_Reg(Amt))) && 4134 LShrAmt == Amt) { 4142 LLT AmtTy = MRI.getType(Amt); 4147 B.buildInstr(FshOpc, {Dst}, {ShlSrc, LShrSrc, Amt}); 4198 Register Amt = MI.getOperand(2).getReg(); 4199 LLT AmtTy = MRI.getType(Amt); [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonVectorCombine.cpp | 126 Value *Amt) const; 128 Value *Amt) const; 2337 Value *Hi, Value *Amt) const -> Value * { 2339 if (isZero(Amt)) 2342 if (auto IntAmt = getIntValue(Amt)) 2350 Hi->getType(), {Hi, Lo, Amt}); 2356 Builder.CreateLShr(Builder.CreateShl(Pair, Amt, "shl"), 32, "lsr"); 2362 Value *Sub = Builder.CreateSub(getConstInt(VecLen), Amt, "sub"); 2369 Value *Hi, Value *Amt) const -> Value * { 2371 if (isZero(Amt)) [all...] |
H A D | HexagonISelDAGToDAGHVX.cpp | 1292 auto valign = [this](OpRef Lo, OpRef Hi, unsigned Amt, MVT Ty, 1294 if (Amt == 0) 1297 if (isUInt<3>(Amt) || isUInt<3>(HwLen - Amt)) { 1298 bool IsRight = isUInt<3>(Amt); // Right align. 1299 SDValue S = getConst32(IsRight ? Amt : HwLen - Amt, dl); 1304 Results.push(Hexagon::A2_tfrsi, MVT::i32, {getConst32(Amt, dl)});
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/freebsd-current/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | BasicBlock.h | 754 /// referencing this BasicBlock by \p Amt. 758 void AdjustBlockAddressRefCount(int Amt) { argument 760 Bits.BlockAddressRefCount += Amt;
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/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSimplifyDemanded.cpp | 1305 Constant *Amt = ConstantInt::get(VarX->getType(), ShlAmt - ShrAmt); local 1306 New = BinaryOperator::CreateShl(VarX, Amt); 1311 Constant *Amt = ConstantInt::get(VarX->getType(), ShrAmt - ShlAmt); local 1312 New = isLshr ? BinaryOperator::CreateLShr(VarX, Amt) : 1313 BinaryOperator::CreateAShr(VarX, Amt);
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 350 SDValue Amt = N->getOperand(1); local 351 EVT AmtVT = Amt.getValueType(); 352 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, 354 return DAG.getNode(AVRISD::ROLLOOP, dl, VT, N->getOperand(0), Amt); 357 SDValue Amt = N->getOperand(1); local 358 EVT AmtVT = Amt.getValueType(); 359 Amt = DAG.getNode(ISD::AND, dl, AmtVT, Amt, 361 return DAG.getNode(AVRISD::RORLOOP, dl, VT, N->getOperand(0), Amt); [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | GCNHazardRecognizer.cpp | 1806 MachineOperand *Amt = TII.getNamedOperand(*MI, AMDGPU::OpName::src0); local 1807 if (!Amt->isReg()) 1810 Register AmtReg = Amt->getReg(); 1880 Amt->setReg(NewAmt); 1881 Amt->setIsKill(false); 1883 Amt->setIsUndef();
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/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 2079 /// Build and insert \p Dst = G_ROTR \p Src, \p Amt 2081 const SrcOp &Amt) { 2082 return buildInstr(TargetOpcode::G_ROTR, {Dst}, {Src, Amt}); 2085 /// Build and insert \p Dst = G_ROTL \p Src, \p Amt 2087 const SrcOp &Amt) { 2088 return buildInstr(TargetOpcode::G_ROTL, {Dst}, {Src, Amt}); 2080 buildRotateRight(const DstOp &Dst, const SrcOp &Src, const SrcOp &Amt) argument 2086 buildRotateLeft(const DstOp &Dst, const SrcOp &Src, const SrcOp &Amt) argument
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/freebsd-current/contrib/llvm-project/llvm/lib/IR/ |
H A D | AutoUpgrade.cpp | 1687 Value *Amt = CI.getArgOperand(1); local 1692 if (Amt->getType() != Ty) { 1694 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1695 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1700 Value *Res = Builder.CreateCall(Intrin, {Src, Src, Amt}); 1754 Value *Amt = CI.getArgOperand(2); local 1762 if (Amt->getType() != Ty) { 1764 Amt [all...] |
H A D | ConstantFold.cpp | 159 ConstantInt *Amt = dyn_cast<ConstantInt>(CE->getOperand(1)); local 160 if (!Amt) 162 APInt ShAmt = Amt->getValue();
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMInstPrinter.cpp | 786 unsigned Amt = ShiftOp & 0x1f; 789 markup(O, Markup::Immediate) << "#" << (Amt == 0 ? 32 : Amt); 790 } else if (Amt) { 792 markup(O, Markup::Immediate) << "#" << Amt;
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