Searched refs:insn (Results 1 - 25 of 224) sorted by relevance

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/freebsd-9.3-release/contrib/binutils/gas/config/
H A Ditbl-mips.h34 #define MIPS_IS_COP_INSN(insn) ((MIPS_OPCODE_COP0&(insn>>25)) \
36 #define MIPS_DECODE_COP_NUM(insn) ((~MIPS_OPCODE_COP0&(insn>>25))>>1)
37 #define MIPS_DECODE_COP_COFUN(insn) ((~MIPS_ENCODE_COP_NUM(3))&(insn))
40 #define ITBL_IS_INSN(insn) MIPS_IS_COP_INSN(insn)
41 #define ITBL_DECODE_PNUM(insn) MIPS_DECODE_COP_NUM(insn)
[all...]
H A Dtc-mep.c38 const CGEN_INSN * insn; member in struct:__anon472
330 mep_check_for_disabled_registers (mep_insn *insn)
343 b = insn->buffer[0] * 256 + insn->buffer[1];
345 b = insn->buffer[1] * 256 + insn->buffer[0];
347 b = insn->buffer[0];
467 /* Variant of mep_cgen_assemble_insn. Assemble insn STR of cpu CD as a
488 const CGEN_INSN *insn = ilist->insn;
328 mep_check_for_disabled_registers(mep_insn *insn) argument
486 const CGEN_INSN *insn = ilist->insn; local
518 mep_save_insn(mep_insn insn) argument
612 mep_insn insn; local
642 mep_insn insn; local
745 mep_insn insn; local
810 mep_insn insn; local
952 mep_insn insn; local
1043 mep_insn insn; local
1142 int insn; member in struct:__anon474
1189 insn_to_subtype(int insn) argument
1553 mep_cgen_record_fixup_exp(fragS *frag, int where, const CGEN_INSN *insn, int length, const CGEN_OPERAND *operand, int opinfo, expressionS *exp) argument
1739 const CGEN_INSN *insn = NULL; local
[all...]
/freebsd-9.3-release/contrib/binutils/include/opcode/
H A Dspu.h91 #define SIGNED_EXTRACT(insn,size,pos) (((int)((insn) << (32-size-pos))) >> (32-size))
92 #define UNSIGNED_EXTRACT(insn,size,pos) (((insn) >> pos) & ((1 << size)-1))
94 #define DECODE_INSN_RT(insn) (insn & 0x7f)
95 #define DECODE_INSN_RA(insn) ((insn >> 7) & 0x7f)
96 #define DECODE_INSN_RB(insn) ((insn >> 1
[all...]
/freebsd-9.3-release/contrib/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.c182 * @param insn - The instruction with the reader function to use. The cursor
188 static int consumeByte(struct InternalInstruction* insn, uint8_t* byte) { argument
189 int ret = insn->reader(insn->readerArg, byte, insn->readerCursor);
192 ++(insn->readerCursor);
200 * @param insn - See consumeByte().
204 static int lookAtByte(struct InternalInstruction* insn, uint8_t* byte) { argument
205 return insn->reader(insn
208 unconsumeByte(struct InternalInstruction* insn) argument
255 dbgprintf(struct InternalInstruction* insn, const char* format, ...) argument
282 setPrefixPresent(struct InternalInstruction* insn, uint8_t prefix, uint64_t location) argument
299 isPrefixAtLocation(struct InternalInstruction* insn, uint8_t prefix, uint64_t location) argument
319 readPrefixes(struct InternalInstruction* insn) argument
640 readOpcode(struct InternalInstruction* insn) argument
761 getIDWithAttrMask(uint16_t* instructionID, struct InternalInstruction* insn, uint8_t attrMask) argument
828 getID(struct InternalInstruction* insn, const void *miiArg) argument
1005 readSIB(struct InternalInstruction* insn) argument
1102 readDisplacement(struct InternalInstruction* insn) argument
1147 readModRM(struct InternalInstruction* insn) argument
1360 fixupReg(struct InternalInstruction *insn, const struct OperandSpecifier *op) argument
1410 readOpcodeModifier(struct InternalInstruction* insn) argument
1445 readOpcodeRegister(struct InternalInstruction* insn, uint8_t size) argument
1495 readImmediate(struct InternalInstruction* insn, uint8_t size) argument
1549 readVVVV(struct InternalInstruction* insn) argument
1574 readOperands(struct InternalInstruction* insn) argument
1711 decodeInstruction(struct InternalInstruction* insn, byteReader_t reader, const void* readerArg, dlog_t logger, void* loggerArg, const void* miiArg, uint64_t startLoc, DisassemblerMode mode) argument
[all...]
H A DX86Disassembler.cpp215 /// @param insn - The internal instruction.
218 InternalInstruction &insn,
228 pcrel = insn.startLocation +
229 insn.immediateOffset + insn.immediateSize;
230 switch (insn.displacementSize) {
298 pcrel = insn.startLocation + insn.immediateOffset + insn.immediateSize;
305 pcrel = insn
216 translateImmediate(MCInst &mcInst, uint64_t immediate, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) argument
326 translateRMRegister(MCInst &mcInst, InternalInstruction &insn) argument
364 translateRMMemory(MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis) argument
548 translateRM(MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) argument
619 translateOperand(MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) argument
677 translateInstruction(MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis) argument
[all...]
/freebsd-9.3-release/contrib/libpcap/
H A Dbpf_dump.c36 const struct bpf_insn *insn; local
40 insn = p->bf_insns;
43 for (i = 0; i < n; ++insn, ++i) {
44 printf("%u %u %u %u\n", insn->code,
45 insn->jt, insn->jf, insn->k);
50 for (i = 0; i < n; ++insn, ++i)
52 insn->code, insn
[all...]
/freebsd-9.3-release/contrib/tcpdump/
H A Dbpf_dump.c40 struct bpf_insn *insn; local
44 insn = p->bf_insns;
47 for (i = 0; i < n; ++insn, ++i) {
48 printf("%u %u %u %u\n", insn->code,
49 insn->jt, insn->jf, insn->k);
54 for (i = 0; i < n; ++insn, ++i)
56 insn->code, insn
[all...]
/freebsd-9.3-release/sys/arm/arm/
H A Ddisassem.c63 * insn[cc][mod] [operands]
266 static void disasm_register_shift(const disasm_interface_t *di, u_int insn);
267 static void disasm_print_reglist(const disasm_interface_t *di, u_int insn);
268 static void disasm_insn_ldrstr(const disasm_interface_t *di, u_int insn,
270 static void disasm_insn_ldrhstrh(const disasm_interface_t *di, u_int insn,
272 static void disasm_insn_ldcstc(const disasm_interface_t *di, u_int insn,
282 u_int insn; local
290 insn = di->di_readword(loc);
292 /* di->di_printf("loc=%08x insn=%08x : ", loc, insn);*/
523 disasm_register_shift(const disasm_interface_t *di, u_int insn) argument
542 disasm_print_reglist(const disasm_interface_t *di, u_int insn) argument
577 disasm_insn_ldrstr(const disasm_interface_t *di, u_int insn, u_int loc) argument
606 disasm_insn_ldrhstrh(const disasm_interface_t *di, u_int insn, u_int loc) argument
635 disasm_insn_ldcstc(const disasm_interface_t *di, u_int insn, u_int loc) argument
[all...]
H A Ddb_interface.c295 branch_taken(u_int insn, db_addr_t pc) argument
299 switch ((insn >> 24) & 0xf) {
302 addr = db_fetch_reg((insn >> 16) & 0xf);
303 if (((insn >> 16) & 0xf) == 15)
305 if (insn & 0x0200000) {
306 offset = (insn >> 7) & 0x1e;
307 offset = (insn & 0xff) << (32 - offset) |
308 (insn & 0xff) >> offset;
311 offset = db_fetch_reg(insn & 0x0f);
312 if ((insn
[all...]
/freebsd-9.3-release/contrib/gcc/
H A Drtl-error.c29 #include "insn-attr.h"
30 #include "insn-config.h"
41 location_for_asm (rtx insn) argument
43 rtx body = PATTERN (insn);
47 /* Find the (or one of the) ASM_OPERANDS in the insn. */
76 of the insn INSN. This is used only when INSN is an `asm' with operands,
79 diagnostic_for_asm (rtx insn, const char *msg, va_list *args_ptr, argument
85 location_for_asm (insn), kind);
90 error_for_asm (rtx insn, const char *gmsgid, ...) argument
95 diagnostic_for_asm (insn, gmsgi
100 warning_for_asm(rtx insn, const char *gmsgid, ...) argument
110 _fatal_insn(const char *msgid, rtx insn, const char *file, int line, const char *function) argument
124 _fatal_insn_not_found(rtx insn, const char *file, int line, const char *function) argument
[all...]
H A Dreorg.c35 execute a branch insn. On an ideal machine, branches take a single
46 find other sources of insns, we can hoist an insn from the branch
66 branch. Then it searches after the insn requiring delay slots or,
96 a copy of an insn involving CC0 since we want to maintain a 1-1
97 correspondence between the insn that sets and uses CC0. The insns are
98 allowed to be separated by placing an insn that sets CC0 (but not an insn
100 delay slot. In that case, we point each insn at the other with REG_CC_USER
109 based on the condition code of the previous insn.
112 effect to the ARM, differing mostly in which insn i
227 stop_search_p(rtx insn, int labels_p) argument
298 insn_references_resource_p(rtx insn, struct resources *res, int include_delayed_effects) argument
314 insn_sets_resource_p(rtx insn, struct resources *res, int include_delayed_effects) argument
346 rtx insn; local
434 rtx insn = gen_return (); local
462 emit_delay_sequence(rtx insn, rtx list, int length) argument
584 add_to_delay_list(rtx insn, rtx delay_list) argument
607 delete_from_delay_slot(rtx insn) argument
666 delete_scheduled_jump(rtx insn) argument
766 optimize_skip(rtx insn) argument
849 get_jump_flags(rtx insn, rtx label) argument
912 rare_destination(rtx insn) argument
1025 get_branch_condition(rtx insn, rtx target) argument
1071 condition_dominates_p(rtx condition, rtx insn) argument
1204 steal_delay_list_from_target(rtx insn, rtx condition, rtx seq, rtx delay_list, struct resources *sets, struct resources *needed, struct resources *other_needed, int slots_to_fill, int *pslots_filled, int *pannul_p, rtx *pnew_thread) argument
1337 steal_delay_list_from_fallthrough(rtx insn, rtx condition, rtx seq, rtx delay_list, struct resources *sets, struct resources *needed, struct resources *other_needed, int slots_to_fill, int *pslots_filled, int *pannul_p) argument
1417 try_merge_delay_insns(rtx insn, rtx thread) argument
1607 redundant_insn(rtx insn, rtx target, rtx delay_list) argument
1816 rtx insn; local
1857 update_block(rtx insn, rtx where) argument
1894 update_reg_dead_notes(rtx insn, rtx delayed_insn) argument
1957 update_reg_unused_notes(rtx insn, rtx redundant_insn) argument
1992 rtx insn, pat, trial, next_trial; local
2496 fill_slots_from_thread(rtx insn, rtx condition, rtx thread, rtx opposite_thread, int likely, int thread_if_true, int own_thread, int slots_to_fill, int *pslots_filled, rtx delay_list) argument
2919 rtx insn; local
3047 rtx insn, next, pat; local
3408 rtx insn, jump_insn, pat; local
3539 rtx insn, next, epilogue_insn = 0; local
[all...]
H A Dsched-deps.c38 #include "insn-config.h"
39 #include "insn-attr.h"
74 Each insn has associated bitmaps for its dependencies. Each bitmap
75 has enough entries to represent a dependency on any other insn in
76 the insn chain. All bitmap for true dependencies cache is
84 /* To speed up checking consistency of formed forward insn
144 find_insn_list (rtx insn, rtx list)
148 if (XEXP (list, 0) == insn)
159 sched_get_condition (rtx insn)
161 rtx pat = PATTERN (insn);
141 find_insn_list(rtx insn, rtx list) argument
155 sched_get_condition(rtx insn) argument
241 maybe_add_or_update_back_dep_1(rtx insn, rtx elem, enum reg_note dep_type, ds_t ds, rtx mem1, rtx mem2, rtx **changed_linkpp) argument
267 add_or_update_back_dep_1(rtx insn, rtx elem, enum reg_note dep_type, ds_t ds ATTRIBUTE_UNUSED, rtx mem1 ATTRIBUTE_UNUSED, rtx mem2 ATTRIBUTE_UNUSED, rtx **changed_linkpp ATTRIBUTE_UNUSED) argument
512 add_back_dep(rtx insn, rtx elem, enum reg_note dep_type, ds_t ds) argument
570 add_dependence_list(rtx insn, rtx list, int uncond, enum reg_note dep_type) argument
582 add_dependence_list_and_free(rtx insn, rtx *listp, int uncond, enum reg_note dep_type) argument
598 delete_all_dependences(rtx insn) argument
630 fixup_sched_groups(rtx insn) argument
673 add_insn_mem_dependence(struct deps *deps, rtx *insn_list, rtx *mem_list, rtx insn, rtx mem) argument
697 flush_pending_lists(struct deps *deps, rtx insn, int for_read, int for_write) argument
723 sched_analyze_reg(struct deps *deps, int regno, enum machine_mode mode, enum rtx_code ref, rtx insn) argument
795 sched_analyze_1(struct deps *deps, rtx x, rtx insn) argument
928 sched_analyze_2(struct deps *deps, rtx x, rtx insn) argument
1118 sched_analyze_insn(struct deps *deps, rtx x, rtx insn) argument
1463 rtx insn; local
1676 rtx insn; local
1885 adjust_add_sorted_back_dep(rtx insn, rtx link, rtx *linkp) argument
1915 adjust_back_add_forw_dep(rtx insn, rtx *linkp) argument
1930 delete_forw_dep(rtx insn, rtx elem) argument
1976 add_dependence(rtx insn, rtx elem, enum reg_note dep_type) argument
1996 add_or_update_back_dep(rtx insn, rtx elem, enum reg_note dep_type, ds_t ds) argument
2004 add_or_update_back_forw_dep(rtx insn, rtx elem, enum reg_note dep_type, ds_t ds) argument
2026 add_back_forw_dep(rtx insn, rtx elem, enum reg_note dep_type, ds_t ds) argument
2034 delete_back_forw_dep(rtx insn, rtx elem) argument
[all...]
H A Djump.c47 #include "insn-config.h"
48 #include "insn-attr.h"
84 rtx insn;
94 for (insn = forced_labels; insn; insn = XEXP (insn, 1))
95 if (LABEL_P (XEXP (insn, 0)))
96 LABEL_NUSES (XEXP (insn, 0))++;
102 non-fallthru insn
83 rtx insn; local
110 rtx insn, next, prev; local
147 rtx insn; local
206 rtx insn; local
233 rtx insn; local
238 mark_jump_label (PATTERN (insn), insn, 0); local
275 rtx insn; local
322 get_label_before(rtx insn) argument
344 get_label_after(rtx insn) argument
368 reversed_comparison_code_parts(enum rtx_code code, rtx arg0, rtx arg1, rtx insn) argument
481 reversed_comparison_code(rtx comparison, rtx insn) argument
789 simplejump_p(rtx insn) argument
804 condjump_p(rtx insn) argument
832 condjump_in_parallel_p(rtx insn) argument
863 pc_set(rtx insn) argument
884 any_uncondjump_p(rtx insn) argument
904 any_condjump_p(rtx insn) argument
924 condjump_label(rtx insn) argument
954 returnjump_p(rtx insn) argument
965 onlyjump_p(rtx insn) argument
1047 rtx insn; local
1104 mark_jump_label(rtx x, rtx insn, int in_mem) argument
1193 mark_jump_label (XEXP (x, i), insn, in_mem); local
1198 mark_jump_label (XVECEXP (x, i, j), insn, in_mem); local
1208 delete_jump(rtx insn) argument
1221 delete_prior_computation(rtx note, rtx insn) argument
1347 delete_computation(rtx insn) argument
1399 delete_related_insns(rtx insn) argument
1529 rtx insn = from; local
1565 redirect_exp_1(rtx *loc, rtx olabel, rtx nlabel, rtx insn) argument
1610 redirect_exp_1 (&XEXP (x, i), olabel, nlabel, insn); local
1615 redirect_exp_1 (&XVECEXP (x, i, j), olabel, nlabel, insn); local
1711 invert_exp_1(rtx x, rtx insn) argument
[all...]
H A Dcfglayout.c30 #include "insn-config.h"
85 rtx insn, last_insn, next_head, prev;
91 for (last_insn = insn = BB_END (bb); (insn = NEXT_INSN (insn)) != 0; )
93 if (insn == next_head)
96 switch (GET_CODE (insn))
99 last_insn = insn;
103 switch (NOTE_LINE_NUMBER (insn))
106 last_insn = insn;
83 rtx insn, last_insn, next_head, prev; local
189 rtx insn; local
250 rtx insn, next; local
381 rtx insn = orig_insn; local
422 insn_scope(rtx insn) argument
489 insn_line(rtx insn) argument
523 insn_file(rtx insn) argument
535 rtx insn, note; local
588 rtx insn = NULL; local
930 rtx insn = BB_HEAD (bb); local
947 rtx insn, last; local
1033 rtx insn; local
[all...]
H A Dcfgbuild.c58 /* Return true if insn is something that should be contained inside basic
62 inside_basic_block_p (rtx insn)
64 switch (GET_CODE (insn))
68 return (NEXT_INSN (insn) == 0
69 || !JUMP_P (NEXT_INSN (insn))
70 || (GET_CODE (PATTERN (NEXT_INSN (insn))) != ADDR_VEC
71 && GET_CODE (PATTERN (NEXT_INSN (insn))) != ADDR_DIFF_VEC));
74 return (GET_CODE (PATTERN (insn)) != ADDR_VEC
75 && GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC);
94 control_flow_insn_p (rtx insn)
60 inside_basic_block_p(rtx insn) argument
92 control_flow_insn_p(rtx insn) argument
148 rtx insn; local
205 rtl_make_eh_edge(sbitmap edge_cache, basic_block src, rtx insn) argument
270 rtx insn, x; local
429 rtx insn, next; local
594 rtx insn = BB_END (bb), tmp; local
638 rtx insn = BB_HEAD (bb); local
[all...]
H A Dpostreload-gcse.c35 #include "insn-config.h"
121 /* The insn that computes the expression. */ member in struct:occr
122 rtx insn;
135 rtx insn;
140 /* Array where each element is the CUID if the insn that last set the hard
154 rtx insn;
166 /* Mapping of insn UIDs to CUIDs.
225 rtx insn;
231 FOR_BB_INSNS (bb, insn)
233 if (INSN_P (insn))
134 rtx insn; member in struct:unoccr
153 rtx insn; member in struct:modifies_mem
222 rtx insn; local
323 insert_expr_in_table(rtx x, rtx insn) argument
446 rtx insn = occr->insn; local
494 oprs_unchanged_p(rtx x, rtx insn, bool after_insn) argument
647 record_last_reg_set_info(rtx insn, int regno) argument
658 record_last_mem_set_info(rtx insn) argument
714 record_opr_changes(rtx insn) argument
719 note_stores (PATTERN (insn), record_last_set_info, insn); local
761 hash_scan_set(rtx insn) argument
829 rtx insn; local
858 rtx insn; local
875 rtx insn; local
887 get_avail_load_store_reg(rtx insn) argument
949 eliminate_partially_redundant_load(basic_block bb, rtx insn, struct expr *expr) argument
1148 rtx insn; local
[all...]
H A Demit-rtl.c30 routines in insn-emit.c, which is generated automatically from
51 #include "insn-config.h"
2084 Used for an inline-procedure after copying the insn chain. */
2089 rtx insn;
2095 for (insn = first; insn; insn = NEXT_INSN (insn)) argument
2096 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2102 /* Go through all the RTL insn bodie
2079 rtx insn; local
2124 unshare_all_rtl_again(rtx insn) argument
2178 verify_rtx_sharing(rtx orig, rtx insn) argument
2257 verify_rtx_sharing (XEXP (x, i), insn); local
2275 verify_rtx_sharing (XVECEXP (x, i, j), insn); local
2313 unshare_all_rtl_in_chain(rtx insn) argument
2678 set_first_insn(rtx insn) argument
2695 set_last_insn(rtx insn) argument
2721 rtx insn = first_insn; local
2747 rtx insn = last_insn; local
2781 rtx insn; local
2807 next_insn(rtx insn) argument
2824 previous_insn(rtx insn) argument
2841 next_nonnote_insn(rtx insn) argument
2857 prev_nonnote_insn(rtx insn) argument
2874 next_real_insn(rtx insn) argument
2891 prev_real_insn(rtx insn) argument
2909 rtx insn; local
2924 active_insn_p(rtx insn) argument
2934 next_active_insn(rtx insn) argument
2951 prev_active_insn(rtx insn) argument
2966 next_label(rtx insn) argument
2981 prev_label(rtx insn) argument
2999 rtx insn; local
3013 link_cc0_insns(rtx insn) argument
3035 next_cc0_user(rtx insn) argument
3056 prev_cc0_setter(rtx insn) argument
3113 rtx insn_last, insn; local
3154 mark_jump_label (PATTERN (insn), insn, 0); local
3282 rtx insn; local
3314 rtx insn; local
3335 rtx insn; local
3355 add_insn(rtx insn) argument
3375 add_insn_after(rtx insn, rtx after) argument
3438 add_insn_before(rtx insn, rtx before) argument
3497 remove_insn(rtx insn) argument
3671 find_line_note(rtx insn) argument
3716 rtx insn; local
3762 rtx insn, last = NULL_RTX; local
3805 rtx last = NULL_RTX, insn; local
3848 rtx insn = rtx_alloc (BARRIER); local
3976 rtx insn = emit_insn_after (x, after); local
4063 rtx insn = rtx_alloc (BARRIER); local
4325 rtx insn; local
4369 rtx last = NULL_RTX, insn; local
4410 rtx insn; local
4560 set_unique_reg_note(rtx insn, enum reg_note kind, rtx datum) argument
4652 rtx insn = emit_jump_insn (x); local
4954 copy_insn(rtx insn) argument
5305 emit_copy_of_insn_after(rtx insn, rtx after) argument
[all...]
H A Dhaifa-sched.c28 We compute insn priorities based on data dependencies. Flow
45 schedule the insn from the end of the list by placing its
47 consider this insn scheduled by setting the pointer to the "end" of
48 the list to point to the previous insn. When an insn has no
60 1. choose insn with the longest path to end of bb, ties
62 2. choose insn with least contribution to register pressure,
66 5. choose insn with largest control flow probability, ties
68 6. choose insn with the least dependences upon the previously
69 scheduled insn, o
421 haifa_classify_insn(rtx insn) argument
629 insn_cost(rtx insn, rtx link, rtx used) argument
644 insn_cost1(rtx insn, enum reg_note dep_type, rtx link, rtx used) argument
716 priority(rtx insn) argument
921 rtx insn = a[n - 1]; local
937 queue_insn(rtx insn, int n_cycles) argument
960 queue_remove(rtx insn) argument
982 ready_add(struct ready_list *ready, rtx insn, bool first_p) argument
1075 ready_remove_insn(rtx insn) argument
1142 schedule_insn(rtx insn) argument
1237 unlink_other_notes(rtx insn, rtx tail) argument
1283 unlink_line_notes(rtx insn, rtx tail) argument
1384 rtx insn; local
1418 rtx insn; local
1438 rtx next_tail, insn; local
1507 rtx insn = get_insns (); local
1559 rtx insn; local
1616 rtx insn, next_tail, head, tail; local
1629 find_insn_reg_weight1(rtx insn) argument
1666 rtx insn; local
1751 ok_for_early_queue_removal(rtx insn) argument
1798 rtx insn; local
1920 reemit_notes(rtx insn) argument
1938 move_insn(rtx insn) argument
2082 rtx insn; local
2174 rtx insn; local
2420 rtx insn; local
2713 rtx insn; local
2752 rtx insn; local
3246 resolve_dep(rtx next, rtx insn) argument
3300 extend_global(rtx insn) argument
3313 extend_all(rtx insn) argument
3326 init_h_i_d(rtx insn) argument
3339 generate_recovery_code(rtx insn) argument
3397 begin_speculative_block(rtx insn) argument
3411 add_to_speculative_block(rtx insn) argument
3707 create_check_block_twin(rtx insn, bool mutate_p) argument
3970 rtx note, insn, link, jump, ready_list = 0; local
4057 change_pattern(rtx insn, rtx new_pat) argument
4076 speculate_insn(rtx insn, ds_t request, rtx *new_pat) argument
4219 rtx insn; local
4477 sched_remove_insn(rtx insn) argument
4487 clear_priorities(rtx insn) argument
4507 calc_priorities(rtx insn) argument
4528 add_jump_dependencies(rtx insn, rtx jump) argument
[all...]
/freebsd-9.3-release/lib/libc/sparc64/sys/
H A D__sparc_utrap_emul.c44 u_int insn; local
50 insn = *(u_int *)uf->uf_pc;
52 switch (IF_OP(insn)) {
54 switch (IF_F3_OP3(insn)) {
56 if (IF_F3_RS1(insn) != 0) {
60 reg = __emul_f3_op2(uf, insn);
63 __emul_store_reg(uf, IF_F3_RD(insn), res);
71 switch (IF_F3_OP3(insn)) {
73 rd = INSFPdq_RN(IF_F3_RD(insn));
74 addr = (u_long *)__emul_f3_memop_addr(uf, insn);
139 __emul_f3_op2(struct utrapframe *uf, u_int insn) argument
149 __emul_f3_memop_addr(struct utrapframe *uf, u_int insn) argument
[all...]
H A D__sparc_utrap_align.c63 u_int insn; local
68 insn = *(u_int *)uf->uf_pc;
70 switch (IF_OP(insn)) {
72 switch (IF_F3_OP3(insn)) {
75 __emul_store_reg(uf, IF_F3_RD(insn), val);
79 __emul_store_reg(uf, IF_F3_RD(insn), val);
83 __emul_store_reg(uf, IF_F3_RD(insn), val);
87 __emul_store_reg(uf, IF_F3_RD(insn),
92 __emul_store_reg(uf, IF_F3_RD(insn),
96 val = __emul_fetch_reg(uf, IF_F3_RD(insn));
[all...]
/freebsd-9.3-release/sys/mips/mips/
H A Dstack_machdep.c56 InstFmt insn; local
64 for (i = pc; i >= (u_register_t)(intptr_t)btext; i -= sizeof (insn)) {
65 bcopy((void *)(intptr_t)i, &insn, sizeof insn);
66 switch (insn.IType.op) {
71 if (insn.IType.rs != SP || insn.IType.rt != SP)
73 stacksize = -(short)insn.IType.imm;
78 if (insn.IType.rs != SP || insn
[all...]
/freebsd-9.3-release/contrib/binutils/opcodes/
H A Dcgen-asm.in66 @arch@_cgen_build_insn_regex (CGEN_INSN *insn)
68 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
69 const char *mnem = CGEN_INSN_MNEMONIC (insn);
87 /* Copy the literal mnemonic out of the insn. */
157 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
158 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
166 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
167 regfree ((regex_t *) CGEN_INSN_RX (insn));
168 free (CGEN_INSN_RX (insn));
169 (CGEN_INSN_RX (insn))
[all...]
H A Dsparc-dis.c33 #define V9_ONLY_P(insn) (! ((insn)->architecture & ~MASK_V9))
35 #define V9_P(insn) (((insn)->architecture & MASK_V9) != 0)
44 /* It is important that we only look at insn code bits as that is how the
191 is_delayed_branch (unsigned long insn) argument
195 for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next)
199 if ((opcode->match & insn) == opcode->match
200 && (opcode->lose & insn) == 0)
255 /* If one (and only one) insn is
455 unsigned long insn; local
[all...]
H A Dspu-dis.c53 get_index_for_opcode (unsigned int insn) argument
56 unsigned int opcode = insn >> (32-11);
98 unsigned int insn; local
109 insn = bfd_getb32 (buffer);
111 index = get_index_for_opcode (insn);
115 (*info->fprintf_func) (info->stream, ".long 0x%x", insn);
127 int fb = (insn >> (32-18)) & 0x7f;
148 DECODE_INSN_RT (insn));
152 DECODE_INSN_RA (insn));
156 DECODE_INSN_RB (insn));
[all...]
H A Dcgen-dis.c39 /* Return the number of decodable bits in this insn. */
41 count_decodable_bits (const CGEN_INSN *insn) argument
43 unsigned mask = CGEN_INSN_BASE_MASK (insn);
57 const CGEN_INSN *insn,
66 This ensures that any insn which is a special case of another will be
68 insn_decodable_bits = count_decodable_bits (insn);
73 int current_decodable_bits = count_decodable_bits (current_buf->insn);
79 /* Now insert the new insn. */
80 hentbuf->insn = insn;
56 add_insn_to_hash_chain(CGEN_INSN_LIST *hentbuf, const CGEN_INSN *insn, CGEN_INSN_LIST **htable, unsigned int hash) argument
116 const CGEN_INSN *insn = &insns[i]; local
[all...]

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