Searched refs:getOrder (Results 1 - 17 of 17) sorted by relevance

/freebsd-9.3-release/contrib/llvm/lib/CodeGen/
H A DAllocationOrder.cpp35 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
H A DAllocationOrder.h43 ArrayRef<MCPhysReg> getOrder() const { return Order; } function in class:llvm::AllocationOrder
H A DRegAllocBase.cpp124 RegClassInfo.getOrder(MRI->getRegClass(VirtReg->reg)).front());
H A DCriticalAntiDepBreaker.cpp366 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(RC);
H A DRegAllocGreedy.cpp690 unsigned OrderLimit = Order.getOrder().size();
709 if (TRI->getCostPerUse(Order.getOrder().back()) >= CostPerUseLimit) {
H A DAggressiveAntiDepBreaker.cpp602 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(SuperRC);
H A DRegAllocFast.cpp535 ArrayRef<MCPhysReg> AO = RegClassInfo.getOrder(RC);
/freebsd-9.3-release/contrib/llvm/include/llvm/CodeGen/
H A DRegisterClassInfo.h91 /// getOrder - Returns the preferred allocation order for RC. The order
94 ArrayRef<MCPhysReg> getOrder(const TargetRegisterClass *RC) const { function in class:llvm::RegisterClassInfo
119 /// the registers in getOrder(RC).
124 /// Get the position of the last cost change in getOrder(RC).
126 /// All registers in getOrder(RC).slice(getLastCostChange(RC)) will have the
/freebsd-9.3-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSDNodeDbgValue.h103 unsigned getOrder() { return Order; } function in class:llvm::SDDbgValue
H A DScheduleDAGSDNodes.cpp714 unsigned DVOrder = DVs[i]->getOrder();
872 (*DI)->getOrder() >= LastOrder && (*DI)->getOrder() < Order; ++DI) {
H A DSelectionDAG.cpp6029 Dbg->getOrder());
/freebsd-9.3-release/sys/boot/ficl/
H A Dsearch.c110 static void getOrder(FICL_VM *pVM) function
371 dictAppendWord(dp, "get-order", getOrder, FW_DEFAULT);
/freebsd-9.3-release/contrib/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp854 ArrayRef<Record*> Order = RC.getOrder();
897 << RC.getOrder().size() << ", sizeof(" << RC.getName() << "Bits), "
1033 ArrayRef<Record*> Order = RC.getOrder();
1150 ArrayRef<Record*> Elems = RC.getOrder(oi);
1163 if (RC.getOrder(oi).empty())
H A DCodeGenRegisters.h350 ArrayRef<Record*> getOrder(unsigned No = 0) const { function in class:llvm::CodeGenRegisterClass
358 // getOrder(0).
H A DAsmMatcherEmitter.cpp1096 (*it)->getOrder().begin(), (*it)->getOrder().end()));
1179 ClassInfo *CI = RegisterSetClasses[RegisterSet(RC.getOrder().begin(),
1180 RC.getOrder().end())];
/freebsd-9.3-release/contrib/llvm/tools/clang/lib/CodeGen/
H A DCGAtomic.cpp364 Order = EmitScalarExpr(E->getOrder());
/freebsd-9.3-release/contrib/llvm/tools/clang/include/clang/AST/
H A DExpr.h4739 Expr *getOrder() const {

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