Searched refs:RADEON_CLOCK_CNTL_INDEX (Results 1 - 10 of 10) sorted by relevance

/freebsd-9.3-release/sys/dev/drm2/radeon/
H A Dradeon_legacy_crtc.c913 WREG32_P(RADEON_CLOCK_CNTL_INDEX,
934 WREG32_P(RADEON_CLOCK_CNTL_INDEX,
H A Dradeon_cp.c283 RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX, addr & 0x1f);
683 clock_cntl_index = RADEON_READ(RADEON_CLOCK_CNTL_INDEX);
718 RADEON_WRITE(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index);
H A Dr100.c2945 save = RREG32(RADEON_CLOCK_CNTL_INDEX);
2947 WREG32(RADEON_CLOCK_CNTL_INDEX, tmp);
2949 WREG32(RADEON_CLOCK_CNTL_INDEX, save);
2957 WREG8(RADEON_CLOCK_CNTL_INDEX, reg & 0x3f);
2966 WREG8(RADEON_CLOCK_CNTL_INDEX, ((reg & 0x3f) | RADEON_PLL_WR_EN));
H A Dradeon_drv.h522 #define RADEON_CLOCK_CNTL_INDEX 0x0008 macro
1860 RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX, \
H A Dradeon_legacy_tv.c289 WREG8(RADEON_CLOCK_CNTL_INDEX, RADEON_PLL_TEST_CNTL);
H A Dradeon_legacy_encoders.c239 WREG32(RADEON_CLOCK_CNTL_INDEX, 0);
H A Dradeon_reg.h349 #define RADEON_CLOCK_CNTL_INDEX 0x0008 macro
H A Dradeon_combios.c1197 ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3;
/freebsd-9.3-release/sys/dev/drm/
H A Dradeon_cp.c286 RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX, addr & 0x1f);
638 clock_cntl_index = RADEON_READ(RADEON_CLOCK_CNTL_INDEX);
673 RADEON_WRITE(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index);
H A Dradeon_drv.h609 #define RADEON_CLOCK_CNTL_INDEX 0x0008 macro
1840 RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX, \

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