Searched refs:Op3 (Results 1 - 11 of 11) sorted by relevance

/freebsd-9.3-release/contrib/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp271 unsigned &Op3) {
281 Op3 = (Op3High << 2) | fieldFromInstruction(Insn, 0, 2);
550 unsigned Op1, Op2, Op3; local
551 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
555 DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder);
563 unsigned Op1, Op2, Op3; local
564 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
568 DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder);
576 unsigned Op1, Op2, Op3; local
577 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
270 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, unsigned &Op3) argument
589 unsigned Op1, Op2, Op3; local
602 unsigned Op1, Op2, Op3; local
616 unsigned Op1, Op2, Op3; local
631 unsigned Op1, Op2, Op3; local
645 unsigned Op1, Op2, Op3; local
659 unsigned Op1, Op2, Op3, Op4, Op5, Op6; local
693 unsigned Op1, Op2, Op3, Op4, Op5; local
713 unsigned Op1, Op2, Op3; local
732 unsigned Op1, Op2, Op3; local
[all...]
/freebsd-9.3-release/contrib/llvm/include/llvm/Target/
H A DTargetSelectionDAGInfo.h60 SDValue Op3, unsigned Align, bool isVolatile,
77 SDValue Op3, unsigned Align, bool isVolatile,
93 SDValue Op3, unsigned Align, bool isVolatile,
107 SDValue Op3, MachinePointerInfo Op1PtrInfo,
57 EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
74 EmitTargetCodeForMemmove(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
90 EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
104 EmitTargetCodeForMemcmp(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const argument
/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.h61 SDValue Op3, unsigned Align,
/freebsd-9.3-release/contrib/llvm/lib/Target/X86/
H A DX86CodeEmitter.cpp454 const MachineOperand &Op3 = MI.getOperand(Op+3);
459 if (Op3.isGlobal()) {
460 DispForReloc = &Op3;
461 } else if (Op3.isSymbol()) {
462 DispForReloc = &Op3;
463 } else if (Op3.isCPI()) {
465 DispForReloc = &Op3;
467 DispVal += MCE.getConstantPoolEntryAddress(Op3.getIndex());
468 DispVal += Op3.getOffset();
470 } else if (Op3
[all...]
H A DX86ISelDAGToDAG.cpp2787 SDValue Op0, Op1, Op2, Op3, Op4; local
2793 if (!SelectAddr(0, Op, Op0, Op1, Op2, Op3, Op4))
2801 OutOps.push_back(Op3);
/freebsd-9.3-release/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h829 SDValue Op3);
831 SDValue Op3, SDValue Op4);
833 SDValue Op3, SDValue Op4, SDValue Op5);
846 SDValue Op1, SDValue Op2, SDValue Op3);
862 EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
864 EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3);
885 SDValue Op1, SDValue Op2, SDValue Op3);
894 SDValue Op1, SDValue Op2, SDValue Op3);
901 SDValue Op3);
H A DSelectionDAGNodes.h760 const SDValue &Op2, const SDValue &Op3) {
768 Ops[3].setInitial(Op3);
/freebsd-9.3-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp5119 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { argument
5120 SDValue Ops[] = { Op1, Op2, Op3 };
5126 SDValue Op3, SDValue Op4) {
5127 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5133 SDValue Op3, SDValue Op4, SDValue Op5) {
5134 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5212 SDValue Op2, SDValue Op3) {
5214 SDValue Ops[] = { Op1, Op2, Op3 };
5271 SDValue Op3) {
5273 SDValue Ops[] = { Op1, Op2, Op3 };
5125 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3, SDValue Op4) argument
5132 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3, SDValue Op4, SDValue Op5) argument
5210 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) argument
5268 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3) argument
5277 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3) argument
5432 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) argument
5469 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3) argument
5495 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3) argument
[all...]
H A DSelectionDAGBuilder.cpp4594 SDValue Op3 = getValue(I.getArgOperand(2));
4599 DAG.setRoot(DAG.getMemcpy(getRoot(), sdl, Op1, Op2, Op3, Align, isVol, false,
4612 SDValue Op3 = getValue(I.getArgOperand(2));
4617 DAG.setRoot(DAG.getMemset(getRoot(), sdl, Op1, Op2, Op3, Align, isVol,
4631 SDValue Op3 = getValue(I.getArgOperand(2));
4636 DAG.setRoot(DAG.getMemmove(getRoot(), sdl, Op1, Op2, Op3, Align, isVol,
H A DLegalizeIntegerTypes.cpp195 SDValue Op3 = GetPromotedInteger(N->getOperand(3)); local
198 Op2, Op3, N->getMemOperand(), N->getOrdering(),
/freebsd-9.3-release/contrib/llvm/include/llvm/Support/
H A DPatternMatch.h1107 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2, const T3 &Op3) { argument
1108 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1, Op2), m_Argument<3>(Op3));

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