Searched refs:N2 (Results 1 - 25 of 25) sorted by relevance

/freebsd-9.3-release/contrib/llvm/include/llvm/ADT/
H A DStringSwitch.h90 template<unsigned N0, unsigned N1, unsigned N2>
92 const char (&S2)[N2], const T& Value) {
96 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3>
98 const char (&S2)[N2], const char (&S3)[N3],
103 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3, unsigned N4>
105 const char (&S2)[N2], const char (&S3)[N3],
/freebsd-9.3-release/share/examples/netgraph/
H A Dvirtual.chain232 M4=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \
234 M5=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \
236 M6=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \
H A Dvirtual.lan225 M4=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \
227 M5=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \
229 M6=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \
/freebsd-9.3-release/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp1348 SDValue N2 = N->getOperand(2); local
1354 if (SelectDirectAddr(N2, Addr)) {
1382 ? SelectADDRsi64(N2.getNode(), N2, Base, Offset)
1383 : SelectADDRsi(N2.getNode(), N2, Base, Offset)) {
1411 ? SelectADDRri64(N2.getNode(), N2, Base, Offset)
1412 : SelectADDRri(N2.getNode(), N2, Bas
1566 SDValue N2; local
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/freebsd-9.3-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp1337 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1338 // the shuffle mask M that point at N1 to point at N2, and indices that point
1339 // N2 to point at N1.
1340 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { argument
1341 std::swap(N1, N2);
1352 SDValue N2, const int *Mask) {
1353 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1357 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1370 if (N1 == N2) {
1371 N2
1351 getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2, const int *Mask) argument
1625 FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, SDLoc dl) argument
2878 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2) argument
3344 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3) argument
3451 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4) argument
3458 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) argument
4951 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, SDValue N1, SDValue N2) argument
4957 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3) argument
4963 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3, SDValue N4) argument
4970 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) argument
[all...]
H A DDAGCombiner.cpp268 SDValue SimplifySelect(SDLoc DL, SDValue N0, SDValue N1, SDValue N2);
269 SDValue SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1, SDValue N2,
600 SDValue N0, N1, N2; local
601 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse())
4192 SDValue N2 = N->getOperand(2); local
4195 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
4200 if (N1 == N2)
4207 return N2;
4210 return DAG.getNode(ISD::OR, SDLoc(N), VT, N0, N2);
4233 return DAG.getNode(ISD::AND, SDLoc(N), VT, NOTNode, N2);
4294 SDValue N2 = N->getOperand(2); local
4362 SDValue N2 = N->getOperand(2); local
6342 SDValue N2 = N->getOperand(2); local
6876 SDValue N2 = N->getOperand(2); local
10298 SimplifySelect(SDLoc DL, SDValue N0, SDValue N1, SDValue N2) argument
10443 SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC, bool NotExtCompare) argument
[all...]
H A DInstrEmitter.cpp530 SDValue N2 = Node->getOperand(2);
531 unsigned SubIdx = cast<ConstantSDNode>(N2)->getZExtValue();
H A DTargetLowering.cpp1911 SDValue N2 = N->getOperand(1); local
1913 ConstantSDNode *V = dyn_cast<ConstantSDNode>(N2);
1918 } else if (isGAPlusOffset(N2.getNode(), GA, Offset)) {
H A DLegalizeDAG.cpp95 SDValue N1, SDValue N2,
189 SDValue N1, SDValue N2,
198 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]);
212 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]);
188 ShuffleWithNarrowerEltType(EVT NVT, EVT VT, SDLoc dl, SDValue N1, SDValue N2, ArrayRef<int> Mask) const argument
/freebsd-9.3-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp120 SDNode *SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2,
355 SDValue N1, SDValue N2,
368 SDValue Ops0[] = { N2, LD->getBasePtr(), LD->getChain() };
354 SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, unsigned Opc8, unsigned Opc16) argument
/freebsd-9.3-release/contrib/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1398 SDValue N2 = N->getOperand(2); local
1405 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2);
1410 SDValue Result = DAG.getNode(ISD::AND, dl, VT, N2,
1422 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne);
1425 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2);
1435 SDValue N2 = N->getOperand(2); local
1445 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne);
1447 SDValue Borrow = N2;
1449 DAG.getConstant(0, VT), N2);
1461 DAG.ComputeMaskedBits(N2, KnownZer
1474 SDValue N2 = N->getOperand(2); local
[all...]
/freebsd-9.3-release/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h538 SDValue getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2,
599 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2);
601 SDValue N1, SDValue N2, SDValue N3);
603 SDValue N1, SDValue N2, SDValue N3, SDValue N4);
605 SDValue N1, SDValue N2, SDValue N3, SDValue N4,
621 SDValue N1, SDValue N2);
623 SDValue N1, SDValue N2, SDValue N3);
625 SDValue N1, SDValue N2, SDValue N3, SDValue N4);
627 SDValue N1, SDValue N2, SDValue N3, SDValue N4,
1067 SDValue N2, IS
[all...]
H A DSelectionDAGNodes.h1214 SDValue N2, const int *M)
1216 InitOperands(Ops, N1, N2);
1213 ShuffleVectorSDNode(EVT VT, unsigned Order, DebugLoc dl, SDValue N1, SDValue N2, const int *M) argument
/freebsd-9.3-release/contrib/ntp/ntpd/
H A Drefclock_wwv.c439 #define N2 (N15 / 2) /* space (-1) */ macro
442 {N2, N2, 0, 0}, /* 0 */
443 {P2, N2, 0, 0}, /* 1 */
444 {N2, P2, 0, 0}, /* 2 */
/freebsd-9.3-release/contrib/llvm/lib/Analysis/
H A DDependenceAnalysis.cpp1895 // 0 <= i <= N1 and some 0 <= j <= N2, where N1 and N2 are the (normalized)
1906 // a1*0 - a2*N2 <= c2 - c1 <= a1*N1 - a2*0
1907 // -a2*N2 <= c2 - c1 <= a1*N1
1910 // a1*0 - a2*0 <= c2 - c1 <= a1*N1 - a2*N2
1911 // 0 <= c2 - c1 <= a1*N1 - a2*N2
1914 // a1*N1 - a2*N2 <= c2 - c1 <= a1*0 - a2*0
1915 // a1*N1 - a2*N2 <= c2 - c1 <= 0
1918 // a1*N1 - a2*0 <= c2 - c1 <= a1*0 - a2*N2
1919 // a1*N1 <= c2 - c1 <= -a2*N2
1936 const SCEV *N2 = collectUpperBound(Loop2, A1->getType()); local
[all...]
/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp3996 /// vrev: N2 = [b1 b0 b3 b2 b5 b4 b7 b6]
3999 /// N3=N1+N2 = [k0 k0 k1 k1 k2 k2 k3 k3] (k0 = b0+b1 = bit-count of 16-bit v0,
4008 SDValue N2 = DAG.getNode(ARMISD::VREV16, DL, VT8Bit, N1); local
4009 SDValue N3 = DAG.getNode(ISD::ADD, DL, VT8Bit, N1, N2);
4052 /// N2 =+[k1 k3 k0 k2 ]
4068 SDValue N2 = DAG.getNode(ARMISD::VUZP, DL, VT16Bit, N1, N1); local
4071 SDValue Extended = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::v4i32, N2);
4075 SDValue Extracted = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v4i16, N2,
5800 SDValue N2; local
5812 N2
5843 SDValue N2, N3; local
5878 SDValue N2, N3; local
8094 SDValue N2 = N->getOperand(2); local
[all...]
H A DARMISelDAGToDAG.cpp2615 SDValue N2 = N0.getOperand(1); local
2616 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
2729 SDValue N2 = N->getOperand(2); local
2733 assert(N2.getOpcode() == ISD::Constant);
2737 cast<ConstantSDNode>(N2)->getZExtValue()),
/freebsd-9.3-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp932 SDValue N2 = N->getOperand(2); local
933 if (N000 == N2 &&
956 SDValue N2 = N->getOperand(2); local
957 if (N000 == N2 &&
/freebsd-9.3-release/sys/dev/hptmv/
H A Damd64-elf.raid.o.uu76 M``-V&TB)[DR)[^@`````]H62````!'0'@(N2````!$'_Q`^V0WA$.>!_P^DO
391 M8$B)W^@%Y?__28G:OP`````/MW5(NP````!!N2````!!NP$```"#_Q]W/P^V
399 MW^B@X___28G:OP`````/MW5(NP````!!N2````!!NP$```"#_Q]W/P^VPTF-
435 M``^WO)U"#```NP````!!N2````!!N@$```"#^A]W1`^VPTF--(1$B<DIT3GY
/freebsd-9.3-release/contrib/llvm/utils/TableGen/
H A DCodeGenDAGPatterns.cpp2078 TreePatternNode *N1 = Nodes[i], *N2 = Nodes[i+1]; local
2079 assert(N1->getNumTypes() == 1 && N2->getNumTypes() == 1 &&
2082 MadeChange |= N1->UpdateNodeType(0, N2->getExtType(0), *this);
2083 MadeChange |= N2->UpdateNodeType(0, N1->getExtType(0), *this);
/freebsd-9.3-release/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp7761 SDValue N2 = Op.getOperand(2); local
7767 isa<ConstantSDNode>(N2)) {
7780 if (N2.getValueType() != MVT::i32)
7781 N2 = DAG.getIntPtrConstant(cast<ConstantSDNode>(N2)->getZExtValue());
7782 return DAG.getNode(Opc, dl, VT, N0, N1, N2);
7785 if (EltVT == MVT::f32 && isa<ConstantSDNode>(N2)) {
7794 N2 = DAG.getIntPtrConstant(cast<ConstantSDNode>(N2)->getZExtValue() << 4);
7797 return DAG.getNode(X86ISD::INSERTPS, dl, VT, N0, N1, N2);
7815 SDValue N2 = Op.getOperand(2); local
[all...]
/freebsd-9.3-release/sys/contrib/dev/ipw/
H A Dipw2100-1.3-i.fw.uu258 M?N2(`("C'Q``+@B0!P``(``4`$X(&`!N"%0`#@@2@!\2'`".""``K@@D`,X(
H A Dipw2100-1.3.fw.uu258 M?N2(`("C'Q``+@B0!P``(``4`$X(&`!N"%0`#@@2@!\2'`".""``K@@D`,X(
/freebsd-9.3-release/sys/dev/hptrr/
H A Di386-elf.hptrr_lib.o.uu3211 M=N2#[`Q7Z$?V__]7Z!7W__^#Q!2#OP@E```!=0U7Z!?W__^#Q`3K"XGV5^@V
5991 M=N2+B)0```"%R77:Z]"#[!2+1"08BU`(B8(0`0``C8(,`0``QX(,`0``Z.8#
6332 M10B#Q!"+7"0PB,%FBT,N2"-$)"!FB44.9HM3+F8IPF8Y^F;'11(```^#_`(`
6696 M=?J_`````(N4)(`````/MUH0O@````"#_Q]W28GQ#[;!C52$4(G]N2`````I
6995 M``")1"08#[=<)#(/MW80*=ZR`(/['W=*#[;"BTPD&(T\@8G=N2`````IV3GQ
7001 MMU@0O@````"#_Q]W3(GR#[;"BTPD%(T4@8G]N2`````I^3G9=@*)V8/Y('4(
7004 M````B?:#_Q]W3(GR#[;"BTPD$(T4@8G]N2`````I^3G9=@*)V8/Y('4(QP+_
H A Damd64-elf.hptrr_lib.o.uu1026 M^'(``$B#PD!,BU3Q,+X`````N2````!,B<!F9I!FD$"(,$C_P$C_R77U28E0
1747 MC8P(^'(``$B#PD!,BU3Q,+X`````N2````!,B<!F9I!FD$"(,$C_P$C_R77U
2480 MPD!,BU3Q,+X`````N2````!,B<!F9I!FD$"(,$C_P$C_R77U28E0&$B+1PA)
4602 MC;M@,P``0;@``0``N2````"Z(`(``.@`````2(MS"$B!PX`S``"Y`0```+H@
4713 M0;@```$$N2$```"Z#P```$R)[^@`````NP````"`?0(`#X:(````10^V]$&_
5283 M````187M=#%!N&0```"Y4,,``(M4)`2+="0(3(GGZ`````"%P'5N2(GOZ```
7366 M"$C_P$C_RG7V3(U4)&"_`````$$/MW88NP````!!N2````!!NP$```"#_Q]W
7604 M0$2+2F!(B[J0````2`^W1"0N2(M4)"!,C00013G,#X4#`0``1(G`*?B)P<'A
11249 M`````"N2`@```````@```-(!``#\_________UV2`@```````@```-(!``#\
11252 M``L```#\`````````,>2`@```````@````L```#\`````````.N2`
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