| /freebsd-9.3-release/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 154 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
827 EVT DestVT = TLI.getValueType(I->getType(), true); local
829 if (SrcVT != MVT::f32 || DestVT != MVT::f64)
845 EVT DestVT = TLI.getValueType(I->getType(), true); local
847 if (SrcVT != MVT::f64 || DestVT != MVT::f32)
1082 EVT DestVT = TLI.getValueType(I->getType(), true); local
1086 if (DestVT != MVT::i16 && DestVT != MVT::i8)
1239 MVT DestVT = VA.getLocVT(); local
1241 (DestVT
1251 MVT DestVT = VA.getLocVT(); local
1305 MVT DestVT = VA.getValVT(); local
1549 MVT DestVT = VA.getLocVT(); local
1602 PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg, bool IsZExt) argument
1674 EVT DestVT = TLI.getValueType(I->getType(), true); local
1717 MVT DestVT = DestEVT.getSimpleVT(); local
[all...] |
| H A D | PPCISelLowering.cpp | 5175 EVT DestVT = MVT::Other) {
5176 if (DestVT == MVT::Other) DestVT = Op.getValueType();
5177 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT,
5185 EVT DestVT = MVT::Other) {
5186 if (DestVT == MVT::Other) DestVT = LHS.getValueType();
5187 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT,
5195 SDLoc dl, EVT DestVT = MVT::Other) {
5196 if (DestVT
[all...] |
| /freebsd-9.3-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 195 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1830 EVT DestVT = TLI.getValueType(I->getType(), true); local
1834 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)
2033 MVT DestVT = VA.getLocVT(); local
2034 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false);
2036 ArgVT = DestVT;
2042 MVT DestVT = VA.getLocVT(); local
2043 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZEx
2116 MVT DestVT = RVLocs[0].getValVT(); local
2195 MVT DestVT = VA.getValVT(); local
2650 EVT SrcVT, DestVT; local
2668 ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt) argument
2823 MVT DestVT = DestEVT.getSimpleVT(); local
[all...] |
| /freebsd-9.3-release/contrib/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 876 MVT DestVT = TLI->getRegisterType(NewVT); local
877 RegisterVT = DestVT;
878 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
879 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
1163 MVT DestVT = getRegisterType(Context, NewVT); local
1164 RegisterVT = DestVT;
1171 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
1172 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
|
| /freebsd-9.3-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 2808 EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
2809 setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Opcode));
2823 EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
2824 setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Condition));
2857 EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
2858 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), DestVT, N));
2865 EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
2866 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurSDLoc(), DestVT, N));
2873 EVT DestVT = TM.getTargetLowering()->getValueType(I.getType());
2874 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurSDLoc(), DestVT,
[all...] |
| H A D | LegalizeDAG.cpp | 120 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT, SDLoc dl);
126 SDValue ExpandLegalINT_TO_FP(bool isSigned, SDValue LegalOp, EVT DestVT,
128 SDValue PromoteLegalINT_TO_FP(SDValue LegalOp, EVT DestVT, bool isSigned,
130 SDValue PromoteLegalFP_TO_INT(SDValue LegalOp, EVT DestVT, bool isSigned,
1715 /// a load from the stack slot to DestVT, extending it if needed.
1719 EVT DestVT,
1733 unsigned DestSize = DestVT.getSizeInBits();
1734 Type *DestType = DestVT.getTypeForEVT(*DAG.getContext());
1738 // later than DestVT.
1752 return DAG.getLoad(DestVT, d
[all...] |
| H A D | LegalizeTypes.cpp | 886 EVT DestVT) {
890 SDValue StackPtr = DAG.CreateStackTemporary(Op.getValueType(), DestVT);
895 return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo(),
885 CreateStackStoreLoad(SDValue Op, EVT DestVT) argument
|
| H A D | LegalizeVectorTypes.cpp | 231 EVT DestVT = N->getValueType(0).getVectorElementType(); local
233 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op);
913 EVT DestVT = N->getValueType(0); local
915 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(DestVT);
932 SrcVT.getSizeInBits() * 2 < DestVT.getSizeInBits()) {
|
| H A D | LegalizeTypes.h | 154 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
|
| /freebsd-9.3-release/contrib/llvm/include/llvm/Target/ |
| H A D | TargetLowering.h | 1051 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) {
1052 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy;
|
| /freebsd-9.3-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 8673 EVT DestVT = Op.getValueType(); local
8675 if (DestVT.bitsLT(MVT::f64))
8676 return DAG.getNode(ISD::FP_ROUND, dl, DestVT, Sub,
8678 if (DestVT.bitsGT(MVT::f64))
8679 return DAG.getNode(ISD::FP_EXTEND, dl, DestVT, Sub);
|