Searched refs:CVMX_CACHE_LINE_SIZE (Results 1 - 5 of 5) sorted by relevance

/freebsd-9.3-release/sys/mips/cavium/
H A Dcvmx_config.h173 #define CVMX_FPA_POOL_0_SIZE (15 * CVMX_CACHE_LINE_SIZE)
174 #define CVMX_FPA_POOL_1_SIZE (1 * CVMX_CACHE_LINE_SIZE)
175 #define CVMX_FPA_POOL_2_SIZE (8 * CVMX_CACHE_LINE_SIZE)
176 #define CVMX_FPA_POOL_3_SIZE (0 * CVMX_CACHE_LINE_SIZE)
177 #define CVMX_FPA_POOL_4_SIZE (0 * CVMX_CACHE_LINE_SIZE)
178 #define CVMX_FPA_POOL_5_SIZE (0 * CVMX_CACHE_LINE_SIZE)
179 #define CVMX_FPA_POOL_6_SIZE (0 * CVMX_CACHE_LINE_SIZE)
180 #define CVMX_FPA_POOL_7_SIZE (0 * CVMX_CACHE_LINE_SIZE)
/freebsd-9.3-release/sys/contrib/octeon-sdk/
H A Dcvmx-utils.h99 #define CVMX_CACHE_LINE_SIZE (128) // In bytes macro
100 #define CVMX_CACHE_LINE_MASK (CVMX_CACHE_LINE_SIZE - 1) // In bytes
101 #define CVMX_CACHE_LINE_ALIGNED __attribute__ ((aligned (CVMX_CACHE_LINE_SIZE)))
H A Dcvmx-helper-fpa.c73 uint64_t align = CVMX_CACHE_LINE_SIZE;
H A Dcvmx-l2c.c342 len -= CVMX_CACHE_LINE_SIZE;
343 ptr += CVMX_CACHE_LINE_SIZE;
433 fault_in(addr, CVMX_CACHE_LINE_SIZE);
465 start += CVMX_CACHE_LINE_SIZE;
466 len -= CVMX_CACHE_LINE_SIZE;
567 start += CVMX_CACHE_LINE_SIZE;
568 len -= CVMX_CACHE_LINE_SIZE;
820 return (cvmx_l2c_get_num_sets() * cvmx_l2c_get_num_assoc() * CVMX_CACHE_LINE_SIZE);
971 CVMX_PREPARE_FOR_STORE (CVMX_ADD_SEG(CVMX_MIPS_SPACE_XKPHYS, index*CVMX_CACHE_LINE_SIZE), 0);
H A Dcvmx-tim.c155 * sizeof(cvmx_tim_bucket_entry_t), CVMX_CACHE_LINE_SIZE);

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