Searched refs:CAST64 (Results 1 - 13 of 13) sorted by relevance

/freebsd-9.3-release/sys/contrib/octeon-sdk/
H A Dcvmx-log.c121 cvmx_log_buffers[buf_num][CVMX_LOG_BUFFER_SIZE-1] = CAST64(cvmx_log_buffers[buf_num+1]);
122 cvmx_log_buffers[CVMX_LOG_NUM_BUFFERS-1][CVMX_LOG_BUFFER_SIZE-1] = CAST64(NULL);
155 if (!(volatile uint64_t)CAST64(cvmx_log_buffer_write_ptr))
161 *cvmx_log_buffer_end_ptr = CAST64(cvmx_log_buffer_head_ptr);
165 *cvmx_log_buffer_end_ptr = CAST64(NULL);
253 __cvmx_log_write(CAST64(format));
268 __cvmx_log_write(CAST64(format));
285 __cvmx_log_write(CAST64(format));
304 __cvmx_log_write(CAST64(format));
325 __cvmx_log_write(CAST64(forma
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H A Dcvmx-access-native.h91 return(CAST64(ptr) & 0x7FFFFFFF);
99 return(CAST64(ptr) & 0x1FFFFFFF);
113 if ((CAST64(ptr) >> 62) == 3)
114 return CAST64(ptr) & cvmx_build_mask(30);
116 return CAST64(ptr) & cvmx_build_mask(40);
125 return CAST64(ptr) - linux_mem32_offset;
150 return CAST64(ptr);
159 if ((CAST64(ptr) >> 62) == 3)
160 return CAST64(ptr) & cvmx_build_mask(30);
162 return CAST64(pt
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H A Dcvmx-dfa.c87 initial_state.s.base_address_div16 = (CAST64(initial_base_address))/16;
H A Dcvmx-pow.c230 printf("One element index=%llu(0x%llx)\n", CAST64(head), CAST64(head));
232 printf("Multiple elements head=%llu(0x%llx) tail=%llu(0x%llx)\n", CAST64(head), CAST64(head), CAST64(tail), CAST64(tail));
348 printf(" wqp=0x%016llx", CAST64(dump->sstatus[core][bit_cur|bit_wqp].s_sstatus4.wqp));
399 printf(" pend_wqp=0x%016llx\n", CAST64(dump->sstatus[core][bit_wqp].s_sstatus1.pend_wqp));
462 CAST64(dump->smemload[index][2].s_smemload1.wqp));
H A Dcvmx-dfa.h660 head = (cvmx_dfa_command_t*)cvmx_phys_to_ptr(CAST64(head)); // NOTE: since we are not storing bit 63 of address, we must set it now
672 cvmx_fau_atomic_write32((cvmx_fau_reg_32_t)(CVMX_FAU_DFA_STATE + (CAST64(&cvmx_dfa_state.s.base_address_div16)-CAST64(&cvmx_dfa_state))),
673 (CAST64(new_base))/16);
685 cvmx_fau_atomic_write16((cvmx_fau_reg_16_t)(CVMX_FAU_DFA_STATE+(CAST64(&cvmx_dfa_state.s.now_serving) - CAST64(&cvmx_dfa_state))),
H A Dcvmx-app-hotplug.c89 cvmx_app_hotplug_info_ptr->data = CAST64(arg);
90 cvmx_app_hotplug_info_ptr->shutdown_callback = CAST64(fn);
H A Dcvmx-tim.c244 CVMX_PREFETCH128(CAST64(bucket_ptr)); /* prefetch the next cacheline for future buckets */
251 cvmx_dprintf("Freeing Timer Chunk 0x%llx\n", CAST64(chunk_addr));
H A Dcvmx-shmem.c80 uint64_t nbase_64 = CAST64(__smdr->break64);
460 cvmx_tlb_write_runtime_entry(free_index, CAST64(dscptr->vaddr),
567 index = cvmx_tlb_lookup(CAST64(dscptr->vaddr));
H A Dcvmx-utils.h96 #define CAST64(v) ((long long)(long)(v)) // use only when 'v' is a pointer macro
H A Dcvmx-app-init-linux.c304 linux_mem32_offset = CAST64(linux_mem32_base_ptr) - linux_mem32_min;
H A Dcvmx-mgmt-port.c196 cvmx_dprintf("WARNING: cvmx_mgmt_port_initialize: Managment port MIX failed BIST (0x%016llx) on MIX%d\n", CAST64(mix_bist.u64), port);
200 cvmx_dprintf("WARNING: cvmx_mgmt_port_initialize: Managment port AGL failed BIST (0x%016llx) on MIX%d\n", CAST64(agl_gmx_bist.u64), port);
264 state->mac += 0xffffff & CAST64(state);
H A Dcvmx-pcie.c628 cvmx_dprintf("PCIe: BIST FAILED for port %d (0x%016llx)\n", pcie_port, CAST64(pescx_bist_status.u64));
992 cvmx_dprintf("PCIe: BIST FAILED for port %d (0x%016llx)\n", pcie_port, CAST64(pemx_bist_status.u64));
995 cvmx_dprintf("PCIe: BIST2 FAILED for port %d (0x%016llx)\n", pcie_port, CAST64(pemx_bist_status2.u64));
H A Dcvmx-pow.h1259 ptr.sio.offset = CAST64(wqp);

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