| /freebsd-13-stable/lib/libc/arm/aeabi/ |
| H A D | aeabi_vfp.h | 55 #define LOAD_DREG(vreg, reg0, reg1) vmov vreg, reg1, reg0
56 #define UNLOAD_DREG(reg0, reg1, vreg) vmov reg1, reg0, vreg
58 #define LOAD_DREG(vreg, reg0, reg1) vmov vreg, reg0, reg1
59 #define UNLOAD_DREG(reg0, reg1, vreg) vmov reg0, reg1, vreg
63 #define LOAD_SREG(vreg, reg) vmov vreg, re
[all...] |
| /freebsd-13-stable/contrib/byacc/test/ |
| H A D | btyacc_calc1.y | 23 INTERVAL vreg[26];
36 %token <ival> DREG VREG /* indices into dreg, vreg arrays */
72 vreg[$1] = $3;
123 $$ = vreg[$1];
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| H A D | calc1.y | 25 INTERVAL vreg[26];
38 %token <ival> DREG VREG /* indices into dreg, vreg arrays */
70 vreg[$1] = $3;
125 $$ = vreg[$1];
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| H A D | varsyntax_calc1.y | 26 INTERVAL vreg[26];
34 int ival; // dreg & vreg array index values
39 %token <ival> DREG VREG // indices into dreg, vreg arrays */
72 vreg[$1] = $3;
127 $$ = vreg[$1];
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| /freebsd-13-stable/contrib/cortex-strings/src/arm/ |
| H A D | memcpy.S | 107 .macro cpy_line_vfp vreg, base
108 vstr \vreg, [dst, #\base]
109 vldr \vreg, [src, #\base]
116 vstr \vreg, [dst, #\base + 32]
117 vldr \vreg, [src, #\base + prefetch_lines * 64 - 32]
126 .macro cpy_tail_vfp vreg, base
127 vstr \vreg, [dst, #\base]
128 vldr \vreg, [src, #\base]
135 vstr \vreg, [dst, #\base + 32]
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| /freebsd-13-stable/contrib/byacc/test/yacc/ |
| H A D | calc1.tab.c | 124 INTERVAL vreg[26]; variable
712 vreg[yystack.l_mark[-3].ival] = yystack.l_mark[-1].vval;
784 yyval.vval = vreg[yystack.l_mark[0].ival];
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| H A D | varsyntax_calc1.tab.c | 125 INTERVAL vreg[26]; variable
136 int ival; /* dreg & vreg array index values*/
713 vreg[yystack.l_mark[-3].ival] = yystack.l_mark[-1].vval;
785 yyval.vval = vreg[yystack.l_mark[0].ival];
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| /freebsd-13-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | RegisterInfos_arm64.h | 514 #define DEFINE_FPU_PSEUDO(reg, size, offset, vreg) \
516 #reg, nullptr, size, FPU_OFFSET(fpu_##vreg - fpu_v0) + offset, \
518 g_contained_##vreg, g_##reg##_invalidates, nullptr, 0 \
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| /freebsd-13-stable/contrib/byacc/test/btyacc/ |
| H A D | calc1.tab.c | 144 INTERVAL vreg[26]; variable
1345 vreg[yystack.l_mark[-3].ival] = yystack.l_mark[-1].vval;
1417 yyval.vval = vreg[yystack.l_mark[0].ival];
|
| H A D | varsyntax_calc1.tab.c | 145 INTERVAL vreg[26]; variable
156 int ival; /* dreg & vreg array index values*/
1346 vreg[yystack.l_mark[-3].ival] = yystack.l_mark[-1].vval;
1418 yyval.vval = vreg[yystack.l_mark[0].ival];
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| H A D | btyacc_calc1.tab.c | 141 INTERVAL vreg[26]; variable
1387 vreg[yystack.l_mark[-2].ival] = yystack.l_mark[0].vval;
1463 yyval.vval = vreg[yystack.l_mark[0].ival];
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 718 << getRegisterName(MI->getOperand(0).getReg(), AArch64::vreg) << ", ";
724 << getRegisterName(MI->getOperand(ListOpNum + 1).getReg(), AArch64::vreg);
934 assert(Op.isReg() && "Non-register vreg operand!");
936 O << getRegisterName(Reg, AArch64::vreg);
1315 O << getRegisterName(Reg, AArch64::vreg) << LayoutSuffix;
|
| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegisterInfo.h | 50 /// registers, including vreg register classes, use/def chains for registers,
72 /// Each element in this list contains the register class of the vreg and the
78 /// Map for recovering vreg name from vreg number.
82 /// StringSet that is used to unique vreg names.
926 void addLiveIn(MCRegister Reg, Register vreg = Register()) {
927 LiveIns.push_back(std::make_pair(Reg, vreg));
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| /freebsd-13-stable/sys/cddl/dev/dtrace/x86/ |
| H A D | dis_tables.c | 2958 dis_gather_regs_t *vreg; local
4885 vreg = &dis_vgather[opcode2][vex_W][vex_L];
4890 vreg->dgr_suffix, OPLEN - strlen(dp->it_name));
4896 dtrace_get_operand(x, REG_ONLY, reg, vreg->dgr_arg2, 2);
4901 dtrace_get_operand(x, REG_ONLY, (0xF - vex_v), vreg->dgr_arg0,
4903 dtrace_get_operand(x, mode, r_m, vreg->dgr_arg1, 1);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AsmPrinter.cpp | 724 AltName = AArch64::vreg;
|