Searched refs:tfe (Results 1 - 11 of 11) sorted by relevance
| /freebsd-13-stable/sbin/ipfw/ |
| H A D | tables.c | 1191 struct tflow_entry *tfe; local
1256 tfe = &tentry->k.flow;
1269 memcpy(&tfe->a.a4.sip, &tmp, 4);
1275 memcpy(&tfe->a.a6.sip6, &tmp, 16);
1300 tfe->proto = key;
1319 tfe->sport = port;
1335 memcpy(&tfe->a.a4.dip, &tmp, 4);
1341 memcpy(&tfe->a.a6.dip6, &tmp, 16);
1361 tfe->dport = port;
1365 tfe
1876 struct tflow_entry *tfe; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIAddIMGInit.cpp | 10 /// Any MIMG instructions that use tfe or lwe require an initialization of the
79 MachineOperand *TFE = TII->getNamedOperand(MI, AMDGPU::OpName::tfe);
83 // Check for instructions that don't have tfe or lwe fields
85 assert( (TFE && LWE) && "Expected tfe and lwe operands in instruction");
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| H A D | SIShrinkInstructions.cpp | 277 int TFEIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::tfe);
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| H A D | SILoadStoreOptimizer.cpp | 684 // Ignore instructions with tfe/lwe set.
685 const auto *TFEOp = TII.getNamedOperand(*CI.I, AMDGPU::OpName::tfe);
1308 .addImm(0) // tfe
1375 .addImm(0) // tfe
1455 .addImm(0) // tfe
1615 .addImm(0) // tfe
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| H A D | SIInstrInfo.cpp | 3713 const MachineOperand *TFE = getNamedOperand(MI, AMDGPU::OpName::tfe);
5116 getNamedOperand(MI, AMDGPU::OpName::tfe)) {
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| H A D | SIISelLowering.cpp | 10664 unsigned TFEIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::tfe) - 1;
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| /freebsd-13-stable/sys/netpfil/ipfw/ |
| H A D | ip_fw_table_algo.c | 3352 struct tflow_entry *tfe; local
3356 tfe = &tent->k.flow;
3358 tfe->af = ent->af;
3359 tfe->proto = ent->proto;
3360 tfe->dport = htons(ent->dport);
3361 tfe->sport = htons(ent->sport);
3367 tfe->a.a4.sip.s_addr = htonl(fe4->sip.s_addr);
3368 tfe->a.a4.dip.s_addr = htonl(fe4->dip.s_addr);
3373 tfe->a.a6.sip6 = fe6->sip6;
3374 tfe
3391 struct tflow_entry *tfe; local
[all...] |
| /freebsd-13-stable/sys/net/ |
| H A D | if_vxlan.c | 590 struct vxlan_ftable_entry *fe, *tfe; local
594 LIST_FOREACH_SAFE(fe, &sc->vxl_ftable[i], vxlfe_hash, tfe) {
604 struct vxlan_ftable_entry *fe, *tfe; local
610 LIST_FOREACH_SAFE(fe, &sc->vxl_ftable[i], vxlfe_hash, tfe) {
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 497 AMDGPU::OpName::tfe);
547 // FIXME: Add tfe support
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| /freebsd-13-stable/sys/contrib/octeon-sdk/ |
| H A D | cvmx-mio-defs.h | 8926 uint64_t tfe : 1; /**< TX FIFO Empty */ member in struct:cvmx_mio_uartx_usr::cvmx_mio_uartx_usr_s
8932 uint64_t tfe : 1;
9508 uint64_t tfe : 1; /**< TX FIFO Empty */ member in struct:cvmx_mio_uart2_usr::cvmx_mio_uart2_usr_s
9514 uint64_t tfe : 1;
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3034 int TFEIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::tfe);
3637 "image data size does not match dmask and tfe");
6054 if (!IsLdsOpcode) { // tfe is not legal with lds opcodes
6249 {"tfe", AMDGPUOperand::ImmTyTFE, true, nullptr},
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