/freebsd-13-stable/contrib/llvm-project/clang/lib/Headers/ |
H A D | amxintrin.h | 133 /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in src0 with 144 /// \param src0 148 #define _tile_dpbssd(dst, src0, src1) __builtin_ia32_tdpbssd((dst), (src0), (src1)) 151 /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in src0 with 162 /// \param src0 166 #define _tile_dpbsud(dst, src0, src1) __builtin_ia32_tdpbsud((dst), (src0), (src1)) 169 /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in src0 with 180 /// \param src0 [all...] |
H A D | opencl-c.h | 17007 int __ovld amd_bfe(int src0, uint src1, uint src2); 17008 int2 __ovld amd_bfe(int2 src0, uint2 src1, uint2 src2); 17009 int3 __ovld amd_bfe(int3 src0, uint3 src1, uint3 src2); 17010 int4 __ovld amd_bfe(int4 src0, uint4 src1, uint4 src2); 17011 int8 __ovld amd_bfe(int8 src0, uint8 src1, uint8 src2); 17012 int16 __ovld amd_bfe(int16 src0, uint16 src1, uint16 src2); 17014 uint __ovld amd_bfe(uint src0, uint src1, uint src2); 17015 uint2 __ovld amd_bfe(uint2 src0, uint2 src1, uint2 src2); 17016 uint3 __ovld amd_bfe(uint3 src0, uint3 src1, uint3 src2); 17017 uint4 __ovld amd_bfe(uint4 src0, uint [all...] |
/freebsd-13-stable/sys/libkern/ |
H A D | bcopy.c | 72 memcpy(void *dst0, const void *src0, size_t length) argument 79 src = src0; 152 (bcopy)(const void *src0, void *dst0, size_t length) argument 155 memcpy(dst0, src0, length);
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/freebsd-13-stable/lib/libc/string/ |
H A D | bcopy.c | 62 (void *dst0, const void *src0, size_t length) 67 bcopy(const void *src0, void *dst0, size_t length) 71 const char *src = src0; 58 memcpy(void *dst0, const void *src0, size_t length) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIPeepholeSDWA.cpp | 334 if (TII->getNamedOperand(*MI, AMDGPU::OpName::src0) == SrcOp) { 369 MachineOperand *Src = TII->getNamedOperand(MI, AMDGPU::OpName::src0); 375 // If this is not src0 then it could be src1 563 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); 604 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); 673 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); 690 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); 745 MachineOperand *OrSDWA = TII->getNamedOperand(MI, AMDGPU::OpName::src0); 751 OrOther = TII->getNamedOperand(MI, AMDGPU::OpName::src0); 930 .add(*TII->getNamedOperand(MI, AMDGPU::OpName::src0)) [all...] |
H A D | R600ExpandSpecialInstrs.cpp | 123 MI.getOperand(1).getReg(), // src0 159 BMI->getOperand(TII->getOperandIdx(Opcode, R600::OpName::src0)) 211 MI.getOperand(TII->getOperandIdx(MI, R600::OpName::src0)).getReg();
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H A D | SIOptimizeExecMaskingPreRA.cpp | 138 MachineOperand *Op1 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src0); 154 Op1 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src0);
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H A D | GCNDPPCombine.cpp | 8 // The pass combines V_MOV_B32_dpp instruction with its VALU uses as a DPP src0 214 auto *Src0 = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0); 217 LLVM_DEBUG(dbgs() << " failed: src0 is illegal\n"); 389 auto *SrcOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0); 516 auto *Src0 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src0);
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H A D | SIFoldOperands.cpp | 202 if (OpNo == AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0)) 808 AMDGPU::getNamedOperandIdx(UseOpc, AMDGPU::OpName::src0))) { 1028 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0); 1065 // Be careful to change the right operand, src0 may belong to a different 1139 const MachineOperand *Src0 = TII->getNamedOperand(*MI, AMDGPU::OpName::src0); 1305 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); 1421 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); 1450 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
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H A D | SIPreEmitPeephole.cpp | 203 MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
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H A D | R600InstrInfo.cpp | 90 NewMI->getOperand(getOperandIdx(*NewMI, R600::OpName::src0)) 256 {R600::OpName::src0, R600::OpName::src0_sel}, 309 {R600::OpName::src0, R600::OpName::src0_sel}, 540 //Todo : support shared src0 - src1 operand 1254 .addReg(Src0Reg) // $src0 1298 OPERAND_CASE(R600::OpName::src0) 1327 getOperandIdx(MI->getOpcode(), getSlotedOps(R600::OpName::src0, Slot)));
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H A D | R600Packetizer.cpp | 131 R600::OpName::src0,
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H A D | SIFixSGPRCopies.cpp | 335 TII->getNamedOperand(*MoveImm, AMDGPU::OpName::src0); 706 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0);
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H A D | SIInstrInfo.cpp | 1838 "All commutable instructions have both src0 and src1 modifiers"); 1887 assert(AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0) == 1905 // src0 should always be able to support any operand type, so no need to 1941 int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0); 2550 const MachineOperand *ImmOp = getNamedOperand(DefMI, AMDGPU::OpName::src0); 2608 MachineOperand *Src0 = getNamedOperand(UseMI, AMDGPU::OpName::src0); 2622 // We should only expect these to be on src0 due to canonicalizations. 2677 // We can however allow an inline immediate as src0. 2892 AMDGPU::OpName::src0); 2905 const MachineOperand *Src0 = getNamedOperand(MI, AMDGPU::OpName::src0); [all...] |
H A D | SIShrinkInstructions.cpp | 75 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0); 114 // We have failed to fold src0, so commute the instruction and try again. 188 // cmpk requires src0 to be a register
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/freebsd-13-stable/sys/netipsec/ |
H A D | key.c | 1942 struct sadb_address *src0, *dst0; local 1978 src0 = (struct sadb_address *)mhp->ext[SADB_EXT_ADDRESS_SRC]; 2007 error = key_checksockaddrs((struct sockaddr *)(src0 + 1), 2010 src0->sadb_address_proto != dst0->sadb_address_proto) { 2016 src0 + 1, 2018 src0->sadb_address_prefixlen, 2020 src0->sadb_address_proto, 2163 struct sadb_address *src0, *dst0; local 2188 src0 = (struct sadb_address *)mhp->ext[SADB_EXT_ADDRESS_SRC]; 2208 if (key_checksockaddrs((struct sockaddr *)(src0 4816 struct sadb_address *src0, *dst0; local 5300 struct sadb_address *src0, *dst0; local 5526 struct sadb_address *src0, *dst0; local 5956 struct sadb_address *src0, *dst0; local 6175 struct sadb_address *src0, *dst0; local 6942 struct sadb_address *src0, *dst0; local 7884 struct sadb_address *src0, *dst0; local [all...] |
/freebsd-13-stable/crypto/openssl/crypto/ec/asm/ |
H A D | ecp_nistz256-x86_64.pl | 3058 my ($a,$b,$src0) = @_; 3059 my $bias = $src0 eq "%rax" ? 0 : -128; 3061 " mov $b, $src0 3071 my ($a,$src0) = @_; 3072 my $bias = $src0 eq "%rax" ? 0 : -128; 3074 " mov 8*0+$a, $src0 3221 my ($src0,$sfx,$bias); 3225 $src0 = "%rax"; 3243 $src0 = "%rdx"; 3293 mov 0x40+8*0($a_ptr), $src0 [all...] |
/freebsd-13-stable/sys/dev/hyperv/vmbus/ |
H A D | vmbus_br.c | 312 const void *src0, uint32_t cplen) 314 const uint8_t *src = src0; 311 vmbus_txbr_copyto(const struct vmbus_txbr *tbr, uint32_t windex, const void *src0, uint32_t cplen) argument
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/freebsd-13-stable/usr.sbin/traceroute6/ |
H A D | traceroute6.c | 364 char hbuf[NI_MAXHOST], src0[NI_MAXHOST], *ep; local 864 src0, sizeof(src0), NULL, 0, NI_NUMERICHOST)) { 868 source = src0;
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/freebsd-13-stable/lib/libipsec/ |
H A D | pfkey.c | 1931 struct sadb_address *src0, *dst0; local 1933 src0 = (struct sadb_address *)(mhp[SADB_EXT_ADDRESS_SRC]); 1936 if (src0->sadb_address_proto != dst0->sadb_address_proto) { 1941 if (PFKEY_ADDR_SADDR(src0)->sa_family 1947 switch (PFKEY_ADDR_SADDR(src0)->sa_family) {
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/freebsd-13-stable/sys/netinet6/ |
H A D | ip6_mroute.c | 1370 struct in6_addr src0, dst0; /* copies for local work */ local 1486 src0 = ip6->ip6_src; 1488 if ((error = in6_setscope(&src0, ifp, &iszone)) != 0 || 1504 if (in6_setscope(&src0, mif6table[mifi].m6_ifp,
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H A D | ip6_output.c | 444 struct in6_addr src0, dst0; local 800 src0 = ip6->ip6_src; 814 if (in6_setscope(&src0, ifp, &zone) == 0 &&
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/freebsd-13-stable/sys/dev/qat/ |
H A D | qat.c | 1187 const uint64_t *src0 = src; local 1193 *(dst0 + i) = htobe64(*(src0 + i)); 1200 const uint32_t *src0 = src; local 1206 *(dst0 + i) = htobe32(*(src0 + i));
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 2581 // v_exp_f32_e32 v5, -1 // VOP1: src0 = 0xFFFFFFFF 2582 // v_exp_f32_e64 v5, -1 // VOP3: src0 = 0x80000001 2918 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0); 2985 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0); 3148 // movrels* opcodes should only allow VGPRS as src0. 3159 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0); 3178 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0); 3370 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0); 3392 // lds_direct is specified as src0. Check additional limitations. 3491 const int Src0Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src0); [all...] |
/freebsd-13-stable/lib/libc/net/ |
H A D | getaddrinfo.c | 1154 explore_copy(const struct addrinfo *pai, const struct addrinfo *src0, argument 1165 for (src = src0; src != NULL; src = src->ai_next) {
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