Searched refs:sgmii (Results 1 - 8 of 8) sorted by relevance

/freebsd-13-stable/sys/mips/nlm/dev/net/
H A Dsgmii.c42 #include <mips/nlm/hal/sgmii.h>
67 /* setup sgmii max frame length */
H A Dxaui.c42 #include <mips/nlm/hal/sgmii.h>
H A Dnae.c42 #include <mips/nlm/hal/sgmii.h>
1384 * XXXJC: split this and merge to sgmii.c
1398 /* Sofreset sgmii port - set bit 11 to 0 */
H A Dxlpge.c90 #include <mips/nlm/hal/sgmii.h>
139 * (18 sgmii / 4 xaui / 2 interlaken instances)
478 /* configuration common for sgmii, xaui, ilaken goes here */
/freebsd-13-stable/sys/dev/etherswitch/e6000sw/
H A De6000sw.c401 e6000sw_serdes_power(device_t dev, int port, bool sgmii) argument
408 if (sgmii)
418 if (sgmii)
429 bool sgmii; local
516 sgmii = false;
518 sgmii = true;
519 e6000sw_serdes_power(sc->dev, port, sgmii);
/freebsd-13-stable/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_main.c1048 al_reg_write32(&adapter->mac_regs_base->sgmii.reg_addr, 0x00000012);
1049 al_reg_write32(&adapter->mac_regs_base->sgmii.reg_data, 0x00000040);
1050 al_reg_write32(&adapter->mac_regs_base->sgmii.reg_addr, 0x00000013);
1051 al_reg_write32(&adapter->mac_regs_base->sgmii.reg_data, 0x00000000);
1055 al_reg_write32(&adapter->mac_regs_base->sgmii.reg_addr, 0x00000014);
1056 al_reg_write32(&adapter->mac_regs_base->sgmii.reg_data, 0x0000000b);
1058 al_reg_write32(&adapter->mac_regs_base->sgmii.reg_addr, 0x00000004);
1059 al_reg_write32(&adapter->mac_regs_base->sgmii.reg_data, 0x000009A0);
1695 al_reg_write32(&adapter->mac_regs_base->sgmii.reg_addr,
1697 sgmii_ctrl = al_reg_read32(&adapter->mac_regs_base->sgmii
[all...]
H A Dal_hal_eth_mac_regs.h659 struct al_eth_mac_sgmii sgmii; /* [0xb00] */ member in struct:al_eth_mac_regs
/freebsd-13-stable/sys/contrib/octeon-sdk/
H A Dcvmx-pcsx-defs.h999 uint64_t sgmii : 1; /**< 1=SGMII or 1000Base-X mode selected, member in struct:cvmx_pcsx_miscx_ctl_reg::cvmx_pcsx_miscx_ctl_reg_s
1034 uint64_t sgmii : 1;

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