Searched refs:setReg (Results 1 - 25 of 134) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyDebugValueManager.cpp34 DBI->getDebugOperand(0).setReg(Reg);
43 Clone->getDebugOperand(0).setReg(NewReg);
H A DWebAssemblyPeephole.cpp67 MO.setReg(NewReg);
123 MO.setReg(NewReg);
H A DWebAssemblyReplacePhysRegs.cpp103 MO.setReg(VReg);
H A DWebAssemblyExplicitLocals.cpp268 MI.getOperand(2).setReg(NewReg);
317 Def.setReg(NewReg);
370 MO.setReg(NewReg);
H A DWebAssemblyMemIntrinsicResults.cpp122 O.setReg(ToReg);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineLoopUtils.cpp56 MO.setReg(R);
68 Use->setReg(R);
77 MO.setReg(Remaps[MO.getReg()]);
92 OrigPhi.getOperand(InitRegIdx).setReg(R);
99 MI.getOperand(LoopRegIdx).setReg(LoopReg);
H A DBreakFalseDeps.cpp145 MO.setReg(CurrMO.getReg());
167 MO.setReg(MaxClearanceReg);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCopyPhysRegs.cpp95 MI->getOperand(1).setReg(Tmp);
101 MI->getOperand(0).setReg(Tmp);
H A DSystemZPostRewrite.cpp125 MBBI->getOperand(1).setReg(DestReg);
132 MBBI->getOperand(2).setReg(DestReg);
230 SrcMO.setReg(DstReg);
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DAntiDepBreaker.h65 MI.getDebugOperand(0).setReg(NewReg);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXFMAMutate.cpp246 MI.getOperand(0).setReg(KilledProdReg);
247 MI.getOperand(1).setReg(KilledProdReg);
248 MI.getOperand(3).setReg(AddendSrcReg);
265 MI.getOperand(2).setReg(AddendSrcReg);
270 MI.getOperand(2).setReg(OtherProdReg);
H A DPPCVSXCopy.cpp114 SrcMO.setReg(NewVReg);
133 SrcMO.setReg(NewVReg);
H A DPPCQPXLoadSplat.cpp109 MI->getOperand(0).setReg(SplatSubReg);
H A DPPCMIPeephole.cpp446 MI.getOperand(1).setReg(DefReg1);
447 MI.getOperand(2).setReg(DefReg2);
468 DefMI->getOperand(0).setReg(MI.getOperand(0).getReg());
536 MI.getOperand(1).setReg(ShiftOp1);
580 Use.getOperand(i).setReg(ConvReg1);
640 SrcMI->getOperand(0).setReg(MI.getOperand(0).getReg());
684 SrcMI->getOperand(0).setReg(MI.getOperand(0).getReg());
937 MI.getOperand(1).setReg(SrcMI->getOperand(1).getReg());
965 MI.getOperand(1).setReg(SrcMI->getOperand(1).getReg());
1455 CMPI2->getOperand(1).setReg(Op
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLocalizer.cpp114 LocalizedMI->getOperand(0).setReg(NewReg);
122 MOUse.setReg(NewVRegIt->second);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXProxyRegErasure.cpp114 Op.setReg(To.getReg());
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DDelaySlotFiller.cpp396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0);
435 OrMI->getOperand(0).setReg(reg - SP::I0 + SP::O0);
469 RestoreMI->getOperand(0).setReg(reg - SP::I0 + SP::O0);
470 RestoreMI->getOperand(1).setReg(SP::G0);
H A DSparcRegisterInfo.cpp193 MI.getOperand(2).setReg(SrcOddReg);
206 MI.getOperand(0).setReg(DestOddReg);
/freebsd-13-stable/contrib/llvm-project/libunwind/src/
H A Dlibunwind.cpp104 co->setReg(regNum, (pint_t)value);
119 co->setReg(UNW_REG_SP, co->getReg(UNW_REG_SP) + info.gp);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp381 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI));
392 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI));
404 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI));
416 Rs.setReg(getHexagonRegisterPair(Rs.getReg(), RI));
542 MO.setReg(High);
554 MO.setReg(High);
568 MO.setReg(High);
601 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsOptimizePICCall.cpp158 I->getOperand(0).setReg(DstReg);
248 getCallTargetRegOpnd(*I)->setReg(getReg(Entry));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ExpandSpecialInstrs.cpp103 DstOp.setReg(R600::OQAP);
109 Mov->getOperand(MovPredSelIdx).setReg(
H A DSIPreAllocateWWMRegs.cpp142 MO.setReg(PhysReg);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrBuilder.h137 MI->getOperand(Operand + 2).setReg(0);
139 MI->getOperand(Operand + 4).setReg(0);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1411 MO.setReg(RegPair.first);
1421 MO.setReg(RegPair.first);
1432 MO.setReg(RegPair.first);
1444 MO.setReg(RegPair.first);
1758 Rss.setReg(matchRegister(Reg1));
1784 Rs.setReg(matchRegister(RegPair));
1789 Rs.setReg(matchRegister(RegPair));
1801 Rs.setReg(matchRegister(RegPair));
1806 Rs.setReg(matchRegister(RegPair));
1818 Rt.setReg(matchRegiste
[all...]

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