Searched refs:scavengeRegister (Results 1 - 8 of 8) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterScavenging.h | 163 Register scavengeRegister(const TargetRegisterClass *RC,
166 Register scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj, function in class:llvm::RegScavenger
168 return scavengeRegister(RegClass, MBBI, SPAdj, AllowSpill);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreRegisterInfo.cpp | 100 unsigned ScratchOffset = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0);
172 ScratchBase = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0);
177 unsigned ScratchOffset = RS->scavengeRegister(&XCore::GRRegsRegClass, II, 0);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64A57FPLoadBalancing.cpp | 141 int scavengeRegister(Chain *G, Color C, MachineBasicBlock &MBB);
496 int AArch64A57FPLoadBalancing::scavengeRegister(Chain *G, Color C,
538 int Reg = scavengeRegister(G, C, MBB);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiRegisterInfo.cpp | 170 Reg = RS->scavengeRegister(&Lanai::GPRRegClass, II, SPAdj);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCRegisterInfo.cpp | 66 BaseReg = RS->scavengeRegister(&ARC::GPR32RegClass, II, SPAdj);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 774 SOffset = RS->scavengeRegister(&AMDGPU::SGPR_32RegClass, MI, 0, false);
1046 Register TmpVGPR = RS->scavengeRegister(&AMDGPU::VGPR_32RegClass, MI, 0);
1142 Register TmpVGPR = RS->scavengeRegister(&AMDGPU::VGPR_32RegClass, MI, 0);
1331 : RS->scavengeRegister(&AMDGPU::VGPR_32RegClass, MI, 0);
1383 RS->scavengeRegister(&AMDGPU::SReg_32_XM0RegClass, MI, 0, false);
1451 Register TmpReg = RS->scavengeRegister(&AMDGPU::VGPR_32RegClass, MI, 0);
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| H A D | SIInstrInfo.cpp | 702 Register Tmp = RS.scavengeRegister(&AMDGPU::VGPR_32RegClass, 0);
710 unsigned Tmp2 = RS.scavengeRegister(&AMDGPU::VGPR_32RegClass, 0);
1463 Register STmp0 = RS->scavengeRegister(&AMDGPU::SGPR_32RegClass, 0);
1464 Register STmp1 = RS->scavengeRegister(&AMDGPU::SGPR_32RegClass, 0);
6734 : RS.scavengeRegister(RI.getBoolRC(), I, 0, false);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterScavenging.cpp | 535 Register RegScavenger::scavengeRegister(const TargetRegisterClass *RC, function in class:RegScavenger
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