Searched refs:isTop (Results 1 - 7 of 7) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMachineScheduler.cpp35 SchedCandidate &FirstCand = Zone.isTop() ? TryCand : Cand;
36 SchedCandidate &SecondCand = Zone.isTop() ? Cand : TryCand;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.h186 MaxPath = std::max(MaxPath, isTop() ? SU.getHeight() : SU.getDepth());
191 bool isTop() const { function in struct:llvm::ConvergingVLIWScheduler::VLIWSchedBoundary
212 unsigned PathLength = isTop() ? SU->getHeight() : SU->getDepth();
H A DHexagonMachineScheduler.cpp376 if (isTop())
394 if (!isTop() && SU->isCall) {
403 startNewCycle = ResourceModel->reserveResources(SU, isTop());
428 unsigned ReadyCycle = isTop() ? SU->TopReadyCycle : SU->BotReadyCycle;
467 return !ResourceModel->isResourceAvailable(*Available.begin(), isTop()) ||
468 getWeakLeft(*Available.begin(), isTop()) != 0;
474 ResourceModel->reserveResources(nullptr, isTop());
H A DHexagonConstPropagation.cpp162 bool isTop() const { return Kind == Top; } function in class:__anon4110::LatticeCell
213 assert(Top.isTop());
469 uint32_t Ps = !isTop() ? properties()
506 } else if (isTop()) {
526 if (isBottom() || L.isTop())
528 if (isTop()) {
607 assert(!isTop() && "Should not call this for a top cell");
2222 assert(!Input.isTop());
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineScheduler.h698 bool isTop() const { function in class:llvm::SchedBoundary
719 return isTop() ? SU->getHeight() : SU->getDepth();
935 unsigned getWeakLeft(const SUnit *SU, bool isTop);
936 int biasPhysReg(const SUnit *SU, bool isTop);
1014 void reschedulePhysReg(SUnit *SU, bool isTop);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineScheduler.cpp1980 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle);
1995 if (!isTop())
2050 ((isTop() && SchedModel->mustBeginGroup(SU->getInstr())) ||
2051 (!isTop() && SchedModel->mustEndGroup(SU->getInstr())))) {
2053 << (isTop() ? "begin" : "end") << " group\n");
2187 if (isTop())
2252 if (!isTop() && SU->isCall) {
2269 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle);
2334 if (isTop()) {
2344 unsigned &TopLatency = isTop()
2947 getWeakLeft(const SUnit *SU, bool isTop) argument
2958 biasPhysReg(const SUnit *SU, bool isTop) argument
3300 reschedulePhysReg(SUnit *SU, bool isTop) argument
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNSchedStrategy.cpp156 initCandidate(TryCand, SU, Zone.isTop(), RPTracker, SRI,

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