Searched refs:isThumb1 (Results 1 - 4 of 4) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp115 bool isThumb1, isThumb2; member in struct:__anon4029::ARMLoadStoreOpt
489 assert(isThumb1 && "Can only update base register uses for Thumb1!");
636 bool SafeToClobberCPSR = !isThumb1 ||
640 bool Writeback = isThumb1; // Thumb1 LDM/STM have base reg writeback.
645 if (isThumb1 && ContainsReg(Regs, Base)) {
656 bool haveIBAndDA = isNotVFP && !isThumb2 && !isThumb1;
662 } else if (Offset == -4 * (int)NumRegs && isNotVFP && !isThumb1) {
696 NewBase = findFreeReg(isThumb1 ? ARM::tGPRRegClass : ARM::GPRRegClass);
703 : (isThumb1 && Base == ARM::SP)
705 : (isThumb1
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H A DARMConstantIslandPass.cpp216 bool isThumb1; member in class:__anon4012::ARMConstantIslands
358 isThumb1 = AFI->isThumb1OnlyFunction();
361 bool GenerateTBB = isThumb2 || (isThumb1 && SynthesizeThumb1TBB);
646 return isThumb1 ? Align(4) : Align(1);
648 return isThumb1 ? Align(4) : Align(2);
1270 unsigned Delta = isThumb1 ? 2 : 4;
1612 if (!isThumb1)
H A DARMBaseInstrInfo.cpp1567 bool isThumb1 = Subtarget.isThumb1Only(); local
1575 if (isThumb1 || !MI->getOperand(1).isDead()) {
1578 : isThumb1 ? ARM::tLDMIA_UPD
1585 if (isThumb1 || !MI->getOperand(0).isDead()) {
1588 : isThumb1 ? ARM::tSTMIA_UPD
H A DARMISelLowering.cpp11274 bool isThumb1 = Subtarget->isThumb1Only(); local
11291 Register TmpReg = MRI.createVirtualRegister(isThumb1 ? &ARM::tGPRRegClass

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