Searched refs:isAvailable (Results 1 - 25 of 52) sorted by relevance

123

/freebsd-13-stable/contrib/llvm-project/lldb/include/lldb/Host/
H A DLZMA.h22 bool isAvailable();
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MCA/Stages/
H A DEntryStage.h41 bool isAvailable(const InstRef &IR) const override;
H A DStage.h42 virtual bool isAvailable(const InstRef &IR) const { return true; } function in class:llvm::mca::Stage
63 return NextInSequence && NextInSequence->isAvailable(IR);
H A DDispatchStage.h72 bool isAvailable(const InstRef &IR) const override;
H A DMicroOpQueueStage.h67 bool isAvailable(const InstRef &IR) const override {
H A DExecuteStage.h62 bool isAvailable(const InstRef &IR) const override;
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Support/
H A DCompression.h30 bool isAvailable();
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/WindowsManifest/
H A DWindowsManifestMerger.h36 bool isAvailable();
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A DRetireControlUnit.h84 bool isAvailable(unsigned Quantity = 1) const { function in struct:llvm::mca::RetireControlUnit
H A DRegisterFile.h222 unsigned isAvailable(ArrayRef<MCPhysReg> Regs) const;
H A DLSUnit.h251 virtual Status isAvailable(const InstRef &IR) const = 0;
255 /// This method assumes that a previous call to `isAvailable(IR)` succeeded
452 Status isAvailable(const InstRef &IR) const override;
456 /// This method assumes that a previous call to `isAvailable(IR)` succeeded
H A DScheduler.h186 Status isAvailable(const InstRef &IR);
193 /// previous call to method `isAvailable(IR)` returned `SC_AVAILABLE`.
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Support/
H A DCompression.cpp47 bool zlib::isAvailable() { return true; } function in class:zlib
89 bool zlib::isAvailable() { return false; }
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MCA/Stages/
H A DDispatchStage.cpp51 const unsigned RegisterMask = PRF.isAvailable(RegDefs);
64 if (RCU.isAvailable(NumMicroOps))
158 bool DispatchStage::isAvailable(const InstRef &IR) const { function in class:llvm::mca::DispatchStage
H A DEntryStage.cpp25 bool EntryStage::isAvailable(const InstRef & /* unused */) const { function in class:llvm::mca::EntryStage
H A DExecuteStage.cpp43 bool ExecuteStage::isAvailable(const InstRef &IR) const { function in class:llvm::mca::ExecuteStage
44 if (Scheduler::Status S = HWS.isAvailable(IR)) {
187 assert(isAvailable(IR) && "Scheduler is not available!");
/freebsd-13-stable/contrib/llvm-project/lldb/source/Host/common/
H A DLZMA.cpp22 bool isAvailable() { return false; } function in namespace:lldb_private::lzma
35 bool isAvailable() { return true; }
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DLatencyPriorityQueue.cpp106 if (SU->isAvailable) return; // All preds scheduled.
109 if (!OnlyAvailablePred || !OnlyAvailablePred->isAvailable) return;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGVLIW.cpp177 SUnits[i].isAvailable = true;
191 PendingQueue[i]->isAvailable = true;
H A DScheduleDAGFast.cpp155 PredSU->isAvailable = true;
342 NewSU->isAvailable = true;
534 RootSU->isAvailable = true;
605 TrySU->isAvailable = false;
618 if (NotReady[i]->isAvailable)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MCA/
H A DPipeline.cpp62 while (!Err && FirstStage.isAvailable(IR))
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Object/
H A DDecompressor.cpp22 if (!zlib::isAvailable())
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h283 bool isAvailable : 1; ///< True once available.
312 isPending(false), isAvailable(false), isScheduled(false),
323 isPending(false), isAvailable(false), isScheduled(false),
332 hasPhysRegClobbers(false), isPending(false), isAvailable(false),
/freebsd-13-stable/contrib/llvm-project/clang/include/clang/Lex/
H A DModuleMap.h176 bool isAvailable() const { function in class:clang::ModuleMap::KnownHeader
177 return getModule()->isAvailable();
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DScheduler.cpp40 Scheduler::Status Scheduler::isAvailable(const InstRef &IR) { function in class:llvm::mca::Scheduler
55 LSUnit::Status LSS = LSU.isAvailable(IR);

Completed in 234 milliseconds

123