Searched refs:Writeback (Results 1 - 10 of 10) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGCall.h | 266 struct Writeback { struct in class:clang::CodeGen::CGCallee::CallArgList
308 Writeback writeback = {srcLV, temporary, toUse};
314 typedef llvm::iterator_range<SmallVectorImpl<Writeback>::const_iterator>
342 SmallVector<Writeback, 1> Writebacks;
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| H A D | CGCall.cpp | 3462 const CallArgList::Writeback &writeback) {
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| /freebsd-13-stable/tests/sys/fs/fusefs/ |
| H A D | utils.hh | 50 Writeback, enumerator in enum:cache_mode
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| H A D | cache.cc | 70 case Writeback:
214 Values(Writethrough, Writeback),
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| H A D | io.cc | 109 case Writeback:
511 Values(Uncached, Writethrough, Writeback, WritebackAsync)
518 Values(Writethrough, Writeback, WritebackAsync)
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| H A D | utils.cc | 106 case Writeback:
107 return "Writeback";
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 232 bool Writeback = true; local
236 Writeback = false;
244 if (Writeback)
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 640 bool Writeback = isThumb1; // Thumb1 LDM/STM have base reg writeback. local
648 Writeback = false;
686 Writeback = false;
793 if (isThumb1 && !SafeToClobberCPSR && Writeback && !BaseKill)
798 if (Writeback) {
799 assert(isThumb1 && "expected Writeback only inThumb1");
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 529 template<bool Writeback>
1578 // Writeback not allowed if Rn is in the target list.
2102 if (writeback) { // Writeback
2839 // Writeback operand
3039 // Writeback Operand
3639 return MCDisassembler::Fail; // Writeback
4961 if (Rm != 0xF) { // Writeback
5026 if (Rm != 0xF) { // Writeback
5091 if (Rm != 0xF) { // Writeback
5154 if (Rm != 0xF) { // Writeback
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 655 bool Load, bool ARMMode, bool Writeback);
7428 bool Load, bool ARMMode, bool Writeback) {
7429 unsigned RtIndex = Load || !Writeback ? 0 : 1;
7464 if (Writeback) {
7593 /*Writeback*/false))
7599 /*Writeback*/true))
7604 /*Writeback*/false))
7610 /*Writeback*/true))
7623 /*Writeback*/false))
7629 /*Writeback*/tru
7426 validateLDRDSTRD(MCInst &Inst, const OperandVector &Operands, bool Load, bool ARMMode, bool Writeback) argument
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