| /freebsd-13-stable/sys/dev/hdmi/ |
| H A D | dwc_hdmi.c | 97 WR1(sc, HDMI_IH_I2CMPHY_STAT0,
99 WR1(sc, HDMI_PHY_I2CM_ADDRESS_ADDR, addr);
100 WR1(sc, HDMI_PHY_I2CM_DATAO_1_ADDR, ((data >> 8) & 0xff));
101 WR1(sc, HDMI_PHY_I2CM_DATAO_0_ADDR, ((data >> 0) & 0xff));
102 WR1(sc, HDMI_PHY_I2CM_OPERATION_ADDR, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE);
109 WR1(sc, HDMI_IH_MUTE_FC_STAT2, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK);
110 WR1(sc, HDMI_FC_MASK2,
146 WR1(sc, HDMI_FC_INVIDCONF, inv_val);
149 WR1(sc, HDMI_FC_INHACTV1, sc->sc_mode.hdisplay >> 8);
150 WR1(s
[all...] |
| H A D | dwc_hdmi.h | 54 WR1(struct dwc_hdmi_softc *sc, bus_size_t off, uint8_t val) function
|
| /freebsd-13-stable/sys/dev/iicbus/pmic/ |
| H A D | act8846.h | 50 #define WR1(sc, reg, val) act8846_write(sc, reg, val) macro
|
| /freebsd-13-stable/sys/dev/tpm/ |
| H A D | tpm20.h | 161 WR1(struct tpm_sc *sc, bus_size_t off, uint8_t val) function
182 WR1(sc, off, RD1(sc, off) | val);
|
| H A D | tpm_tis.c | 201 WR1(sc, TPM_INT_VECTOR, channel);
328 WR1(sc, TPM_DATA_FIFO, *buf++);
348 WR1(sc, TPM_ACCESS, TPM_ACCESS_LOC_REQ);
|
| /freebsd-13-stable/sys/arm/nvidia/ |
| H A D | as3722.c | 235 rv = WR1(sc, AS3722_INTERRUPT_MASK1, 0);
238 rv = WR1(sc, AS3722_INTERRUPT_MASK2, 0);
241 rv = WR1(sc, AS3722_INTERRUPT_MASK3, 0);
244 rv = WR1(sc, AS3722_INTERRUPT_MASK4, 0);
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| H A D | as3722_gpio.c | 200 rv = WR1(sc, AS3722_GPIO0_CONTROL + pin, ctrl);
449 rv = WR1(sc, AS3722_GPIO0_CONTROL + pin, ctrl);
|
| H A D | as3722.h | 286 #define WR1(sc, reg, val) as3722_write(sc, reg, val) macro
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| /freebsd-13-stable/sys/arm64/nvidia/tegra210/ |
| H A D | max77620_gpio.c | 262 rv = WR1(sc, pin->reg, reg);
360 rv = WR1(sc, MAX77620_REG_PUE_GPIO, sc->gpio_reg_pue);
369 rv = WR1(sc, MAX77620_REG_PDE_GPIO, sc->gpio_reg_pde);
378 rv = WR1(sc, MAX77620_REG_AME_GPIO, sc->gpio_reg_ame);
563 rv = WR1(sc, pin->reg, reg);
569 rv = WR1(sc, MAX77620_REG_PUE_GPIO, sc->gpio_reg_pue);
579 rv = WR1(sc, MAX77620_REG_PDE_GPIO, sc->gpio_reg_pde);
|
| H A D | max77620.h | 227 #define WR1(sc, reg, val) max77620_write(sc, reg, val) macro
|
| /freebsd-13-stable/sys/dev/sdhci/ |
| H A D | sdhci.c | 89 #define WR1(slot, off, val) SDHCI_WRITE_1((slot)->bus, (slot), (off), (val)) macro
266 WR1(slot, SDHCI_SOFTWARE_RESET, mask);
452 WR1(slot, SDHCI_POWER_CONTROL, pwr);
470 WR1(slot, SDHCI_POWER_CONTROL, pwr);
478 WR1(slot, SDHCI_POWER_CONTROL, pwr);
487 WR1(slot, SDHCI_POWER_CONTROL, pwr | 0x10);
489 WR1(slot, SDHCI_POWER_CONTROL, pwr);
1273 WR1(slot, SDHCI_HOST_CONTROL, slot->hostctrl);
1832 WR1(slot, SDHCI_TIMEOUT_CONTROL, div);
2065 WR1(slo
[all...] |
| /freebsd-13-stable/sys/arm/broadcom/bcm2835/ |
| H A D | bcm2835_sdhost.c | 285 WR1(struct bcm_sdhost_softc *sc, bus_size_t off, uint8_t val) function
1058 WR1(sc, HC_POWER, val2);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 613 Hexagon::W0, Hexagon::WR0, Hexagon::W1, Hexagon::WR1, Hexagon::W2,
|