| /freebsd-13-stable/sys/contrib/openzfs/module/zfs/ |
| H A D | vdev_raidz_math_avx2.c | 47 #define VR0(r...) VR0_(r) macro
76 "vpxor 0x00(%[SRC]), %%" VR0(r)", %%" VR0(r) "\n" \
84 "vpxor 0x00(%[SRC]), %%" VR0(r)", %%" VR0(r) "\n" \
98 "vpxor %" VR0(r) ", %" VR4(r)", %" VR4(r) "\n" \
105 "vpxor %" VR0(r) ", %" VR2(r)", %" VR2(r) "\n" \
120 "vmovdqa %" VR0(r) ", %" VR4(r) "\n" \
127 "vmovdqa %" VR0(r) ", %" VR2(r) "\n" \
140 "vmovdqa 0x00(%[SRC]), %%" VR0(
[all...] |
| H A D | vdev_raidz_math_avx512bw.c | 51 #define VR0(r...) VR0_(r) macro
79 "vpxorq 0x00(%[SRC]), %%" VR0(r)", %%" VR0(r) "\n" \
87 "vpxorq 0x00(%[SRC]), %%" VR0(r)", %%" VR0(r) "\n" \
101 "vpxorq %" VR0(r) ", %" VR4(r)", %" VR4(r) "\n" \
108 "vpxorq %" VR0(r) ", %" VR2(r)", %" VR2(r) "\n" \
123 "vmovdqa64 %" VR0(r) ", %" VR4(r) "\n" \
130 "vmovdqa64 %" VR0(r) ", %" VR2(r) "\n" \
143 "vmovdqa64 0x00(%[SRC]), %%" VR0(
[all...] |
| H A D | vdev_raidz_math_powerpc_altivec_common.h | 54 #define VR0(r...) VR0_(r) macro
150 "vxor " VR0(r) "," VR0(r) ",21\n" \
180 "vxor " VR0(r) "," VR0(r) ",21\n" \
195 "vxor " VR0(r) "," VR0(r) ",21\n" \
212 "vxor " VR4(r) "," VR4(r) "," VR0(r) "\n" \
221 "vxor " VR2(r) "," VR2(r) "," VR0(r) "\n" \
236 "vxor " VR0(
[all...] |
| H A D | vdev_raidz_math_aarch64_neon_common.h | 53 #define VR0(r...) VR0_(r) macro
149 "eor " VR0(r) ".16b," VR0(r) ".16b,v21.16b\n" \
179 "eor " VR0(r) ".16b," VR0(r) ".16b,v21.16b\n" \
194 "eor " VR0(r) ".16b," VR0(r) ".16b,v21.16b\n" \
211 "eor " VR4(r) ".16b," VR4(r) ".16b," VR0(r) ".16b\n" \
220 "eor " VR2(r) ".16b," VR2(r) ".16b," VR0(r) ".16b\n" \
235 "eor " VR0(
[all...] |
| H A D | vdev_raidz_math_avx512f.c | 50 #define VR0(r...) VR0_(r) macro
93 "vpxorq 0x00(%[SRC]), %%" VR0(r)", %%" VR0(r) "\n" \
107 "vpxorq %" VR0(r) ", %" VR4(r)", %" VR4(r) "\n" \
114 "vpxorq %" VR0(r) ", %" VR2(r)", %" VR2(r) "\n" \
129 "vmovdqa64 %" VR0(r) ", %" VR4(r) "\n" \
136 "vmovdqa64 %" VR0(r) ", %" VR2(r) "\n" \
147 "vmovdqa64 0x00(%[SRC]), %%" VR0(r) "\n" \
161 "vmovdqa64 %%" VR0(r) ", 0x00(%[DST])\n" \
185 "vpandq %" VR0(
[all...] |
| H A D | vdev_raidz_math_sse2.c | 49 #define VR0(r...) VR0_(r, 1, 2, 3, 4, 5, 6) macro
69 "pxor 0x00(%[SRC]), %%" VR0(r) "\n" \
77 "pxor 0x00(%[SRC]), %%" VR0(r) "\n" \
82 __asm("pxor 0x00(%[SRC]), %%" VR0(r) "\n" \
93 "pxor %" VR0(r) ", %" VR4(r) "\n" \
100 "pxor %" VR0(r) ", %" VR2(r) "\n" \
105 "pxor %" VR0(r) ", %" VR1(r)); \
117 "movdqa %" VR0(r) ", %" VR4(r) "\n" \
124 "movdqa %" VR0(r) ", %" VR2(r) "\n" \
129 "movdqa %" VR0(
[all...] |
| H A D | vdev_raidz_math_ssse3.c | 48 #define VR0(r...) VR0_(r) macro
77 "pxor 0x00(%[SRC]), %%" VR0(r) "\n" \
85 "pxor 0x00(%[SRC]), %%" VR0(r) "\n" \
99 "pxor %" VR0(r) ", %" VR4(r) "\n" \
106 "pxor %" VR0(r) ", %" VR2(r) "\n" \
121 "movdqa %" VR0(r) ", %" VR4(r) "\n" \
128 "movdqa %" VR0(r) ", %" VR2(r) "\n" \
141 "movdqa 0x00(%[SRC]), %%" VR0(r) "\n" \
149 "movdqa 0x00(%[SRC]), %%" VR0(r) "\n" \
163 "movdqa %%" VR0(
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEFrameLowering.cpp | 207 Register VR0 = MRI.createVirtualRegister(RC); local
215 TII.loadRegFromStack(MBB, I, VR0, FI, RC, &RegInfo, 0);
216 BuildMI(MBB, I, DL, Desc, Lo).addReg(VR0, RegState::Kill);
232 Register VR0 = MRI.createVirtualRegister(RC); local
238 BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);
239 TII.storeRegToStack(MBB, I, VR0, true, FI, RC, &RegInfo, 0);
265 Register VR0 = MRI.createVirtualRegister(RC); local
272 BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);
274 .addReg(VR0, RegState::Kill);
|