Searched refs:VC2 (Results 1 - 2 of 2) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 190 // (OR (SHL RS1, VC2), VC1)
193 // with VC2, the shamt:
195 // VC1 == maskTrailingOnes<uint64_t>(VC2)
207 uint64_t VC2 = Shl.getConstantOperandVal(1); local
208 if (VC1 == maskTrailingOnes<uint64_t>(VC2)) {
210 Shamt = CurDAG->getTargetConstant(VC2, SDLoc(N),
217 uint32_t VC2 = Shl.getConstantOperandVal(1); local
218 if (VC1 == maskTrailingOnes<uint32_t>(VC2)) {
220 Shamt = CurDAG->getTargetConstant(VC2, SDLoc(N),
234 // (OR (SRL RS1, VC2), VC
251 uint64_t VC2 = Srl.getConstantOperandVal(1); local
261 uint32_t VC2 = Srl.getConstantOperandVal(1); local
336 uint64_t VC2 = Shl.getConstantOperandVal(1); local
370 uint32_t VC2 = Shl.getConstantOperandVal(1); local
402 uint32_t VC2 = Srl.getConstantOperandVal(1); local
445 uint32_t VC2 = Shl.getConstantOperandVal(1); local
493 uint32_t VC2 = Shl.getConstantOperandVal(1); local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 8809 llvm::sort(VContexts, [](const ValueContext &VC1, const ValueContext &VC2) {
8810 return VC1.VI.getAccessSpecifier() < VC2.VI.getAccessSpecifier();
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