Searched refs:VC1 (Results 1 - 2 of 2) sorted by relevance
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.cpp | 190 // (OR (SHL RS1, VC2), VC1) 192 // and then we check that VC1, the mask used to fill with ones, is compatible 195 // VC1 == maskTrailingOnes<uint64_t>(VC2) 206 uint64_t VC1 = Or.getConstantOperandVal(1); local 208 if (VC1 == maskTrailingOnes<uint64_t>(VC2)) { 216 uint32_t VC1 = Or.getConstantOperandVal(1); local 218 if (VC1 == maskTrailingOnes<uint32_t>(VC2)) { 234 // (OR (SRL RS1, VC2), VC1) 236 // and then we check that VC1, the mask used to fill with ones, is compatible 239 // VC1 250 uint64_t VC1 = Or.getConstantOperandVal(1); local 260 uint32_t VC1 = Or.getConstantOperandVal(1); local 335 uint64_t VC1 = And.getConstantOperandVal(1); local 369 uint32_t VC1 = Or.getConstantOperandVal(1); local 401 uint32_t VC1 = Or.getConstantOperandVal(1); local 444 uint32_t VC1 = Srl.getConstantOperandVal(1); local 492 uint32_t VC1 = Srl.getConstantOperandVal(1); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/AsmParser/ |
H A D | LLParser.cpp | 8809 llvm::sort(VContexts, [](const ValueContext &VC1, const ValueContext &VC2) { 8810 return VC1.VI.getAccessSpecifier() < VC2.VI.getAccessSpecifier();
|
Completed in 90 milliseconds