Searched refs:TmpR (Results 1 - 5 of 5) sorted by relevance
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 232 Register TmpR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); local 234 BuildMI(MB, II, DL, HII.get(Hexagon::A2_addi), TmpR) 237 BP = TmpR;
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H A D | HexagonSplitDouble.cpp | 817 Register TmpR = MRI->createVirtualRegister(IntRC); local 821 // TmpR = extractu R.lo, #s, #32-s 822 // HiR = or (TmpR, asl(R.hi, #s)) 825 // TmpR = shr R.lo, #s 826 // LoR = insert TmpR, R.hi, #s, #32-s 831 // TmpR = shr R.lo, #s 839 BuildMI(B, MI, DL, TII->get(A2_asrh), TmpR) 842 BuildMI(B, MI, DL, TII->get(ShiftOpc), (Left ? LoR : TmpR)) 847 // TmpR = extractu R.lo, #s, #32-s 848 BuildMI(B, MI, DL, TII->get(S2_extractu), TmpR) [all...] |
H A D | HexagonFrameLowering.cpp | 1761 Register TmpR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); 1762 BuildMI(B, It, DL, HII.get(TargetOpcode::COPY), TmpR).add(MI->getOperand(1)); 1764 .addReg(TmpR, RegState::Kill); 1766 NewRegs.push_back(TmpR); 1784 // TmpR = C2_tfrpr SrcR if SrcR is a predicate register 1785 // TmpR = A2_tfrcrr SrcR if SrcR is a modifier register 1786 Register TmpR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); local 1789 BuildMI(B, It, DL, HII.get(TfrOpc), TmpR) 1792 // S2_storeri_io FI, 0, TmpR 1796 .addReg(TmpR, RegStat 1817 Register TmpR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); local [all...] |
H A D | HexagonConstExtenders.cpp | 1578 unsigned TmpR = MRI->createVirtualRegister(&Hexagon::IntRegsRegClass); local 1579 BuildMI(MBB, At, dl, HII->get(Hexagon::S2_asl_i_r), TmpR) 1585 .add(MachineOperand(Register(TmpR, 0))); 1588 .add(MachineOperand(Register(TmpR, 0)))
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/freebsd-13-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
H A D | BugReporterVisitors.cpp | 1439 if (const auto *TmpR = dyn_cast<CXXTempObjectRegion>(R)) 1440 InitE = TmpR->getExpr();
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