Searched refs:SrcRegBank (Results 1 - 3 of 3) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 921 const auto &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); local
924 if (SrcRegBank.getID() == ARM::FPRRegBankID) {
949 if (SrcRegBank.getID() != DstRegBank.getID()) {
955 if (SrcRegBank.getID() != ARM::GPRRegBankID) {
1016 const auto &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); local
1019 if (SrcRegBank.getID() != DstRegBank.getID()) {
1026 if (SrcRegBank.getID() != ARM::GPRRegBankID) {
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 240 const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); local
245 if (DstSize > SrcSize && SrcRegBank.getID() == X86::GPRRegBankID &&
249 getRegClass(MRI.getType(SrcReg), SrcRegBank);
281 if (SrcRegBank.getID() == X86::GPRRegBankID &&
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 731 const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); local
743 if (SrcRegBank != DstRegBank && (DstSize == 1 && SrcSize == 1))
746 return {getMinClassForRegBank(SrcRegBank, SrcSize, true),
756 const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); local
807 if (getMinSizeForRegBank(SrcRegBank) > DstSize) {
819 getMinClassForRegBank(SrcRegBank, DstSize, /* GetAllRegSet */ true);
826 getMinClassForRegBank(SrcRegBank, DstSize, /* GetAllRegSet */ true);
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