Searched refs:SrcOps (Results 1 - 8 of 8) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | ConstantFoldingMIRBuilder.h | 29 ArrayRef<SrcOp> SrcOps,
48 assert(SrcOps.size() == 2 && "Invalid src ops");
50 const SrcOp &Src0 = SrcOps[0];
51 const SrcOp &Src1 = SrcOps[1];
59 assert(SrcOps.size() == 2 && "Invalid src ops");
61 const SrcOp &Src0 = SrcOps[0];
62 const SrcOp &Src1 = SrcOps[1];
69 return MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps);
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| H A D | CSEMIRBuilder.h | 73 ArrayRef<SrcOp> SrcOps, Optional<unsigned> Flags,
95 ArrayRef<SrcOp> SrcOps,
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| H A D | MachineIRBuilder.h | 1645 ArrayRef<SrcOp> SrcOps,
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 915 ArrayRef<SrcOp> SrcOps,
922 assert(SrcOps.size() == 3 && "Invalid select");
924 DstOps[0].getLLTTy(*getMRI()), SrcOps[0].getLLTTy(*getMRI()),
925 SrcOps[1].getLLTTy(*getMRI()), SrcOps[2].getLLTTy(*getMRI()));
948 assert(SrcOps.size() == 2 && "Invalid Srcs");
950 SrcOps[0].getLLTTy(*getMRI()),
951 SrcOps[1].getLLTTy(*getMRI()));
958 assert(SrcOps.size() == 2 && "Invalid Srcs");
960 SrcOps[
913 buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps, ArrayRef<SrcOp> SrcOps, Optional<unsigned> Flags) argument
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| H A D | CSEMIRBuilder.cpp | 91 ArrayRef<SrcOp> SrcOps,
98 // Then add the SrcOps.
99 profileSrcOps(SrcOps, B);
139 ArrayRef<SrcOp> SrcOps,
158 assert(SrcOps.size() == 2 && "Invalid sources");
160 if (Optional<APInt> Cst = ConstantFoldBinOp(Opc, SrcOps[0].getReg(),
161 SrcOps[1].getReg(), *getMRI()))
167 assert(SrcOps.size() == 2 && "Invalid src ops");
169 const SrcOp &Src0 = SrcOps[0];
170 const SrcOp &Src1 = SrcOps[
90 profileEverything(unsigned Opc, ArrayRef<DstOp> DstOps, ArrayRef<SrcOp> SrcOps, Optional<unsigned> Flags, GISelInstProfileBuilder &B) const argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 39 SmallVector<SrcOp, 2> SrcOps; ///< Source registers. member in struct:ShuffleVectorPseudo
41 std::initializer_list<SrcOp> SrcOps)
42 : Opc(Opc), Dst(Dst), SrcOps(SrcOps){};
374 MIRBuilder.buildInstr(MatchInfo.Opc, {MatchInfo.Dst}, MatchInfo.SrcOps);
386 MIRBuilder.buildConstant(LLT::scalar(32), MatchInfo.SrcOps[2].getImm());
388 {MatchInfo.SrcOps[0], MatchInfo.SrcOps[1], Cst});
40 ShuffleVectorPseudo(unsigned Opc, Register Dst, std::initializer_list<SrcOp> SrcOps) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 21368 SmallVectorImpl<SDValue> &SrcOps,
21412 SrcOps.push_back(Src);
21424 for (SDValue &SrcOp : SrcOps)
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 18894 SmallVector<SDValue, 4> SrcOps;
18899 SrcOps.push_back(Op.getOperand(0));
18929 SDValue NewConcat = DAG.getNode(ISD::CONCAT_VECTORS, DL, ConcatSrcVT, SrcOps);
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