Searched refs:ShiftValue (Results 1 - 5 of 5) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | Alignment.h | 41 uint8_t ShiftValue = 0; /// The log2 of the required alignment. member in struct:llvm::Align
42 /// ShiftValue is less than 64 by construction.
79 ShiftValue = Log2_64(Value);
80 assert(ShiftValue < 64 && "Broken invariant");
85 uint64_t value() const { return uint64_t(1) << ShiftValue; }
109 constexpr Align(LogValue CA) : ShiftValue(CA.Log) {}
217 inline unsigned Log2(Align A) { return A.ShiftValue; }
242 inline unsigned encode(MaybeAlign A) { return A ? A->ShiftValue + 1 : 0; }
249 Out.ShiftValue = Value - 1;
293 return Lhs.ShiftValue
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCAsmBackend.cpp | 109 unsigned ShiftValue = (Size * 8) - 8; local
111 Data[Offset + I] |= uint8_t(Value >> ShiftValue);
112 ShiftValue -= 8;
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| H A D | SystemZMCCodeEmitter.cpp | 164 unsigned ShiftValue = (Size * 8) - 8; local
166 OS << uint8_t(Bits >> ShiftValue);
167 ShiftValue -= 8;
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4933 uint64_t ShiftValue = ImmValue; local
4935 ShiftValue = MaxShift - ImmValue;
4936 TOut.emitRRI(Mips::ROTR, DReg, SReg, ShiftValue, Inst.getLoc(), STI);
5075 uint64_t ShiftValue = ImmValue % 32; local
5077 ShiftValue = (32 - ImmValue % 32) % 32;
5079 TOut.emitRRI(FinalOpcode, DReg, SReg, ShiftValue, Inst.getLoc(), STI);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 8127 SDValue ShiftValue; local
8129 ShiftValue = DAG.getBuildVector(ShiftVT, DL, ShiftValues);
8131 ShiftValue = ShiftValues[0];
8132 return DAG.getNode(ISD::SRA, DL, VT, N0.getOperand(0), ShiftValue);
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