Searched refs:Sel1 (Results 1 - 7 of 7) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonLoopIdiomRecognition.cpp | 1666 if (SelectInst *Sel1 = dyn_cast<SelectInst>(Sel->getFalseValue())) {
1667 if (Sel1->getCondition() == C)
1668 return B.CreateSelect(C, Sel->getTrueValue(), Sel1->getFalseValue());
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 1238 Value *Sel1 = Sel0.getFalseValue(); local
1268 std::swap(X, Sel1);
1280 if (!Sel1->hasOneUse())
1297 if (!match(Sel1, m_Select(m_Value(Cmp1), m_Value(ReplacementLow),
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8126 SDValue Sel1;
8136 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV);
8137 if (Sel1.getValueType() == MVT::f32) // Comparison is always 64-bits
8138 Sel1 = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Sel1);
8140 DAG.getNode(ISD::FNEG, dl, MVT::f64, LHS), Sel1, FV);
8172 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, TV, FV);
8173 if (Sel1.getValueType() == MVT::f32) // Comparison is always 64-bits
8174 Sel1 = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Sel1);
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 2177 bool Sel1 = SelectVOP3PMadMixModsImpl(Src1, Src1, Src1Mods); local
2185 if (Sel0 || Sel1 || Sel2) {
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| H A D | AMDGPULegalizerInfo.cpp | 2730 auto Sel1 = B.buildSelect(
2733 B.buildICmp(CmpInst::ICMP_NE, S1, C3, Zero32), Sel1, MulHi3);
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| H A D | AMDGPUISelLowering.cpp | 1908 SDValue Sel1 = DAG.getSelectCC(DL, C6, Zero, Add4, Add3, ISD::SETNE); local
1909 SDValue Div = DAG.getSelectCC(DL, C3, Zero, Sel1, Mulhi3, ISD::SETNE);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 2263 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); local
2264 Rep = Builder.CreateOr(Sel0, Sel1);
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