Searched refs:ScratchRSrcReg (Results 1 - 5 of 5) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineFunctionInfo.h | 286 StringValue ScratchRSrcReg = "$private_rsrc_reg"; member in struct:llvm::yaml::final
311 YamlIO.mapOptional("scratchRSrcReg", MFI.ScratchRSrcReg,
335 Register ScratchRSrcReg = AMDGPU::PRIVATE_RSRC_REG; member in class:llvm::final
721 return ScratchRSrcReg;
726 ScratchRSrcReg = Reg;
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| H A D | AMDGPUTargetMachine.cpp | 1113 if (parseRegister(YamlMFI.ScratchRSrcReg, MFI->ScratchRSrcReg) ||
1118 if (MFI->ScratchRSrcReg != AMDGPU::PRIVATE_RSRC_REG &&
1119 !AMDGPU::SGPR_128RegClass.contains(MFI->ScratchRSrcReg)) {
1120 return diagnoseRegisterClass(YamlMFI.ScratchRSrcReg);
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| H A D | SIMachineFunctionInfo.cpp | 80 ScratchRSrcReg = AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3;
87 ArgDescriptor::createRegister(ScratchRSrcReg);
550 ScratchRSrcReg(regToString(MFI.getScratchRSrcReg(), TRI)),
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| H A D | SIRegisterInfo.cpp | 325 unsigned ScratchRSrcReg = MFI->getScratchRSrcReg();
326 if (ScratchRSrcReg != AMDGPU::NoRegister) {
330 reserveRegisterTuples(Reserved, ScratchRSrcReg);
340 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg));
346 assert(!isSubRegister(ScratchRSrcReg, FrameReg));
352 assert(!isSubRegister(ScratchRSrcReg, BasePtrReg));
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| H A D | SIISelLowering.cpp | 2900 SDValue ScratchRSrcReg local
2902 RegsToPass.emplace_back(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3, ScratchRSrcReg);
2903 CopyFromChains.push_back(ScratchRSrcReg.getValue(1));
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