/freebsd-13-stable/contrib/llvm-project/lld/ELF/Arch/ |
H A D | AMDGPU.cpp | 30 RelExpr getRelExpr(RelType type, const Symbol &s, 32 RelType getDynRel(RelType type) const override; 83 RelExpr AMDGPU::getRelExpr(RelType type, const Symbol &s, 105 RelType AMDGPU::getDynRel(RelType type) const {
|
H A D | PPC.cpp | 27 RelExpr getRelExpr(RelType type, const Symbol &s, 29 RelType getDynRel(RelType type) const override; 41 bool needsThunk(RelExpr expr, RelType relocType, const InputFile *file, 45 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override; 48 RelExpr adjustRelaxExpr(RelType type, const uint8_t *data, 50 int getTlsGdRelaxSkip(RelType type) const override; 198 bool PPC::needsThunk(RelExpr expr, RelType type, const InputFile *file, 211 bool PPC::inBranchRange(RelType type, uint64_t src, uint64_t dst) const { 218 RelExpr PPC::getRelExpr(RelType typ [all...] |
H A D | MSP430.cpp | 36 RelExpr getRelExpr(RelType type, const Symbol &s, 48 RelExpr MSP430::getRelExpr(RelType type, const Symbol &s,
|
H A D | AArch64.cpp | 34 RelExpr getRelExpr(RelType type, const Symbol &s, 36 RelType getDynRel(RelType type) const override; 41 bool needsThunk(RelExpr expr, RelType type, const InputFile *file, 45 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override; 46 bool usesOnlyLowPageBits(RelType type) const override; 49 RelExpr adjustRelaxExpr(RelType type, const uint8_t *data, 82 RelExpr AArch64::getRelExpr(RelType type, const Symbol &s, 162 RelExpr AArch64::adjustRelaxExpr(RelType type, const uint8_t *data, 172 bool AArch64::usesOnlyLowPageBits(RelType typ [all...] |
H A D | Mips.cpp | 29 RelExpr getRelExpr(RelType type, const Symbol &s, 31 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 32 RelType getDynRel(RelType type) const override; 37 bool needsThunk(RelExpr expr, RelType type, const InputFile *file, 42 bool usesOnlyLowPageBits(RelType type) const override; 80 RelExpr MIPS<ELFT>::getRelExpr(RelType type, const Symbol &s, 202 template <class ELFT> RelType MIPS<ELFT>::getDynRel(RelType type) const { 360 bool MIPS<ELFT>::needsThunk(RelExpr expr, RelType typ [all...] |
H A D | PPC64.cpp | 104 bool elf::isPPC64SmallCodeModelTocReloc(RelType type) { 276 int getTlsGdRelaxSkip(RelType type) const override; 278 RelExpr getRelExpr(RelType type, const Symbol &s, 280 RelType getDynRel(RelType type) const override; 289 bool needsThunk(RelExpr expr, RelType type, const InputFile *file, 293 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override; 294 RelExpr adjustRelaxExpr(RelType type, const uint8_t *data, 433 int PPC64::getTlsGdRelaxSkip(RelType type) const { 644 RelExpr PPC64::getRelExpr(RelType typ [all...] |
H A D | X86.cpp | 26 int getTlsGdRelaxSkip(RelType type) const override; 27 RelExpr getRelExpr(RelType type, const Symbol &s, 29 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 31 RelType getDynRel(RelType type) const override; 40 RelExpr adjustRelaxExpr(RelType type, const uint8_t *data, 74 int X86::getTlsGdRelaxSkip(RelType type) const { 78 RelExpr X86::getRelExpr(RelType type, const Symbol &s, 164 RelExpr X86::adjustRelaxExpr(RelType type, const uint8_t *data, 191 RelType X8 [all...] |
H A D | Hexagon.cpp | 30 RelExpr getRelExpr(RelType type, const Symbol &s, 32 RelType getDynRel(RelType type) const override; 91 RelExpr Hexagon::getRelExpr(RelType type, const Symbol &s, 382 RelType Hexagon::getDynRel(RelType type) const {
|
H A D | RISCV.cpp | 32 RelType getDynRel(RelType type) const override; 33 RelExpr getRelExpr(RelType type, const Symbol &s, 184 RelType RISCV::getDynRel(RelType type) const { 186 : static_cast<RelType>(R_RISCV_NONE); 189 RelExpr RISCV::getRelExpr(const RelType type, const Symbol &s,
|
H A D | ARM.cpp | 29 RelExpr getRelExpr(RelType type, const Symbol &s, 31 RelType getDynRel(RelType type) const override; 32 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 40 bool needsThunk(RelExpr expr, RelType type, const InputFile *file, 44 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override; 86 RelExpr ARM::getRelExpr(RelType type, const Symbol &s, 165 RelType ARM::getDynRel(RelType type) const { 280 bool ARM::needsThunk(RelExpr expr, RelType typ [all...] |
H A D | AVR.cpp | 46 RelExpr getRelExpr(RelType type, const Symbol &s, 55 RelExpr AVR::getRelExpr(RelType type, const Symbol &s,
|
/freebsd-13-stable/contrib/llvm-project/lld/ELF/ |
H A D | Target.h | 19 std::string toString(elf::RelType type); 29 virtual RelExpr getRelExpr(RelType type, const Symbol &s, 31 virtual RelType getDynRel(RelType type) const { return 0; } 36 virtual int64_t getImplicitAddend(const uint8_t *buf, RelType type) const; 37 virtual int getTlsGdRelaxSkip(RelType type) const { return 1; } 60 virtual bool usesOnlyLowPageBits(RelType type) const; 64 virtual bool needsThunk(RelExpr expr, RelType relocType, 81 // Return true if we can reach dst from src with RelType type. 82 virtual bool inBranchRange(RelType typ [all...] |
H A D | Target.cpp | 43 std::string lld::toString(RelType type) { 132 int64_t TargetInfo::getImplicitAddend(const uint8_t *buf, RelType type) const { 136 bool TargetInfo::usesOnlyLowPageBits(RelType type) const { return false; } 138 bool TargetInfo::needsThunk(RelExpr expr, RelType type, const InputFile *file, 149 bool TargetInfo::inBranchRange(RelType type, uint64_t src, uint64_t dst) const { 153 RelExpr TargetInfo::adjustRelaxExpr(RelType type, const uint8_t *data,
|
H A D | Relocations.h | 26 using RelType = uint32_t; 106 RelType type;
|
/freebsd-13-stable/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
H A D | RuntimeDyldCOFFX86_64.h | 91 switch (RE.RelType) { 102 uint64_t Delta = 4 + (RE.RelType - COFF::IMAGE_REL_AMD64_REL32); 146 uint64_t Offset, uint64_t RelType, uint64_t Addend, 172 // FIXME: If RelType == COFF::IMAGE_REL_AMD64_ADDR32NB we should be able 179 const RelocationEntry RE(SectionID, Offset, RelType, Addend); 185 RelType = COFF::IMAGE_REL_AMD64_ADDR64; 187 return std::make_tuple(Offset, RelType, Addend); 209 uint64_t RelType = RelI->getType(); variable 238 switch (RelType) { 251 std::tie(Offset, RelType, Adden 145 generateRelocationStub(unsigned SectionID, StringRef TargetName, uint64_t Offset, uint64_t RelType, uint64_t Addend, StubMap &Stubs) argument [all...] |
H A D | RuntimeDyldMachOARM.h | 67 switch (RE.RelType) { 109 uint32_t RelType = Obj.getAnyRelocationType(RelInfo); variable 134 if (RelType == MachO::ARM_RELOC_HALF_SECTDIFF) 137 else if (RelType == MachO::GENERIC_RELOC_VANILLA) 145 switch (RelType) { 153 if (RelType > MachO::ARM_RELOC_HALF_SECTDIFF) 155 Twine(RelType) + 176 if (RE.RelType == MachO::ARM_THUMB_RELOC_BR22) 181 (RE.RelType == MachO::ARM_THUMB_RELOC_BR22) ? 4 : 8); 185 if (!Value.SymbolName && (RelType [all...] |
H A D | RuntimeDyldCOFFThumb.h | 79 uint64_t RelType = RelI->getType(); variable 88 switch (RelType) { 103 << " RelType: " << RelTypeName << " TargetName: " 121 if (RelType != COFF::IMAGE_REL_ARM_SECTION) 126 RelocationEntry RE(SectionID, Offset, RelType, 0, -1, 0, 0, 0, false, 0); 134 switch (RelType) { 141 RelocationEntry(SectionID, Offset, RelType, Addend, TargetSectionID, 148 RelocationEntry(SectionID, Offset, RelType, Addend, TargetSectionID, 155 RelocationEntry(TargetSectionID, Offset, RelType, 0); 161 RelocationEntry(SectionID, Offset, RelType, TargetOffse [all...] |
H A D | RuntimeDyldCOFFI386.h | 58 uint64_t RelType = RelI->getType(); variable 74 if (RelType != COFF::IMAGE_REL_I386_SECTION) 84 switch (RelType) { 101 << " RelType: " << RelTypeName << " TargetName: " 105 RelocationEntry RE(SectionID, Offset, RelType, 0, -1, 0, 0, 0, false, 0); 109 switch (RelType) { 117 RelocationEntry(SectionID, Offset, RelType, Addend, TargetSectionID, 124 RelocationEntry(TargetSectionID, Offset, RelType, 0); 130 RelocationEntry(SectionID, Offset, RelType, TargetOffset + Addend); 146 switch (RE.RelType) { [all...] |
H A D | RuntimeDyldMachOAArch64.h | 40 switch (RE.RelType) { 46 << getRelocName(RE.RelType); 58 << getRelocName(RE.RelType); 76 switch (RE.RelType) { 156 MachO::RelocationInfoType RelType, int64_t Addend) const { 158 switch (RelType) { 176 switch (RelType) { 307 if (RE.RelType == MachO::ARM64_RELOC_POINTER_TO_GOT) { 333 if (RE.RelType == MachO::ARM64_RELOC_POINTER_TO_GOT) { 341 if (RE.RelType 155 encodeAddend(uint8_t *LocalAddress, unsigned NumBytes, MachO::RelocationInfoType RelType, int64_t Addend) const argument 360 MachO::RelocationInfoType RelType = variable [all...] |
H A D | RuntimeDyldMachOX86_64.h | 42 uint32_t RelType = Obj.getAnyRelocationType(RelInfo); variable 44 if (RelType == MachO::X86_64_RELOC_SUBTRACTOR) 62 switch (RelType) { 65 if (RelType > MachO::X86_64_RELOC_TLV) 67 Twine(RelType) + 72 if (RE.RelType == MachO::X86_64_RELOC_GOT || 73 RE.RelType == MachO::X86_64_RELOC_GOT_LOAD) 100 switch (RE.RelType) {
|
H A D | RuntimeDyldMachOI386.h | 42 uint32_t RelType = Obj.getAnyRelocationType(RelInfo); variable 45 if (RelType == MachO::GENERIC_RELOC_SECTDIFF || 46 RelType == MachO::GENERIC_RELOC_LOCAL_SECTDIFF) 49 else if (RelType == MachO::GENERIC_RELOC_VANILLA) 52 "type: " + Twine(RelType)).str()); 55 switch (RelType) { 60 if (RelType > MachO::GENERIC_RELOC_TLV) 62 Twine(RelType) + 109 switch (RE.RelType) {
|
H A D | RuntimeDyldELFMips.cpp | 18 resolveMIPSO32Relocation(Section, RE.Offset, Value, RE.RelType, RE.Addend); 20 resolveMIPSN32Relocation(Section, RE.Offset, Value, RE.RelType, RE.Addend, 23 resolveMIPSN64Relocation(Section, RE.Offset, Value, RE.RelType, RE.Addend, 34 Value = evaluateMIPS64Relocation(Section, RE.Offset, Value, RE.RelType, 46 RE.RelType); 281 // RelType is used to keep information for which relocation type we are 283 uint32_t RelType = r_type; local 285 RelType, Addend, 288 RelType = r_type2; 289 CalculatedValue = evaluateMIPS64Relocation(Section, Offset, 0, RelType, [all...] |
H A D | RuntimeDyldCOFFAArch64.h | 101 uint64_t Offset, uint64_t RelType, uint64_t Addend, 128 const RelocationEntry RE(SectionID, Offset, RelType, Addend); 136 RelType = INTERNAL_REL_ARM64_LONG_BRANCH26; 138 return std::make_tuple(Offset, RelType, Addend); 161 uint64_t RelType = RelI->getType(); variable 191 switch (RelType) { 203 std::tie(Offset, RelType, Addend) = generateRelocationStub( 204 SectionID, TargetName, Offset, RelType, Addend, Stubs); 242 << " RelType: " << RelTypeName << " TargetName: " 247 RelocationEntry RE(SectionID, Offset, RelType, Adden 100 generateRelocationStub(unsigned SectionID, StringRef TargetName, uint64_t Offset, uint64_t RelType, uint64_t Addend, StubMap &Stubs) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/ |
H A D | RuntimeDyldELF.cpp | 937 return resolveRelocation(Section, RE.Offset, Value, RE.RelType, RE.Addend, 987 void RuntimeDyldELF::processSimpleRelocation(unsigned SectionID, uint64_t Offset, unsigned RelType, RelocationValueRef Value) { argument 988 RelocationEntry RE(SectionID, Offset, RelType, Value.Addend, Value.Offset); 995 uint32_t RuntimeDyldELF::getMatchingLoRelocation(uint32_t RelType, argument 997 switch (RelType) { 1069 unsigned RelType = RelI->getType(); local 1075 RelType, 0); 1110 RelType, 0); 1120 uint64_t RelType = RelI->getType(); local 1136 LLVM_DEBUG(dbgs() << "\t\tRelType: " << RelType << " Adden [all...] |
H A D | RuntimeDyldImpl.h | 39 #define UNIMPLEMENTED_RELOC(RelType) \ 40 case RelType: \ 41 return make_error<RuntimeDyldError>("Unimplemented relocation: " #RelType) 125 /// RelType - relocation type. 126 uint32_t RelType; member in class:llvm::RelocationEntry 154 : SectionID(id), Offset(offset), RelType(type), Addend(addend), 159 : SectionID(id), Offset(offset), RelType(type), Addend(addend), 165 : SectionID(id), Offset(offset), RelType(type), Addend(addend), 171 : SectionID(id), Offset(offset), RelType(type), 182 : SectionID(id), Offset(offset), RelType(typ [all...] |