Searched refs:RegisterCell (Results 1 - 6 of 6) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DBitTracker.h40 struct RegisterCell;
44 using CellMapType = std::map<unsigned, RegisterCell>;
52 const RegisterCell &lookup(unsigned Reg) const;
53 RegisterCell get(RegisterRef RR) const;
54 void put(RegisterRef RR, const RegisterCell &RC);
299 struct BitTracker::RegisterCell { struct in class:llvm::BitTracker
300 RegisterCell(uint16_t Width = DefaultBitN) : Bits(Width) {} function in struct:llvm::BitTracker::RegisterCell
315 bool meet(const RegisterCell &RC, unsigned SelfR);
316 RegisterCell &insert(const RegisterCell
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H A DBitTracker.cpp34 // ficant bit. Each bit is propagated individually. The class RegisterCell
49 // RegisterCell RC = BT.get(Reg);
115 raw_ostream &operator<<(raw_ostream &OS, const BT::RegisterCell &RC) {
183 for (const std::pair<unsigned, RegisterCell> P : Map)
201 bool BT::RegisterCell::meet(const RegisterCell &RC, unsigned SelfR) {
214 BT::RegisterCell &BT::RegisterCell::insert(const BT::RegisterCell &RC,
235 BT::RegisterCell B
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H A DHexagonBitTracker.cpp252 #define rc(i) RegisterCell::ref(getCell(Reg[i], Inputs))
260 auto rr0 = [this,Reg] (const BT::RegisterCell &Val, CellMapType &Outputs)
267 uint16_t W) -> BT::RegisterCell {
272 return RegisterCell::self(0, W);
277 auto lo = [this] (const BT::RegisterCell &RC, uint16_t RW)
278 -> BT::RegisterCell {
283 auto hi = [this] (const BT::RegisterCell &RC, uint16_t RW)
284 -> BT::RegisterCell {
290 auto half = [this] (const BT::RegisterCell &RC, unsigned N)
291 -> BT::RegisterCell {
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H A DHexagonBitTracker.h28 using RegisterCell = BitTracker::RegisterCell;
H A DHexagonBitSimplify.cpp203 static bool isEqual(const BitTracker::RegisterCell &RC1, uint16_t B1,
204 const BitTracker::RegisterCell &RC2, uint16_t B2, uint16_t W);
205 static bool isZero(const BitTracker::RegisterCell &RC, uint16_t B,
207 static bool getConst(const BitTracker::RegisterCell &RC, uint16_t B,
314 bool HexagonBitSimplify::isEqual(const BitTracker::RegisterCell &RC1,
315 uint16_t B1, const BitTracker::RegisterCell &RC2, uint16_t B2,
330 bool HexagonBitSimplify::isZero(const BitTracker::RegisterCell &RC,
339 bool HexagonBitSimplify::getConst(const BitTracker::RegisterCell &RC,
1279 const BitTracker::RegisterCell &DC = BT.lookup(RD.Reg);
1280 const BitTracker::RegisterCell
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H A DHexagonGenInsert.cpp274 const BitTracker::RegisterCell &lookup(unsigned VR) {
279 const BitTracker::RegisterCell *CP = CVect[RInd];
288 using CellVectType = std::vector<const BitTracker::RegisterCell *>;
294 // according to the corresponding BitTracker::RegisterCell objects.
308 // RegisterCell objects.
341 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1), &RC2 = CM.lookup(VR2);
358 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1);
359 const BitTracker::RegisterCell &RC2 = CM.lookup(VR2);
630 // ordering RB), and then sort it using the RegisterCell comparator.
650 const BitTracker::RegisterCell
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