Searched refs:RegOpnd (Results 1 - 3 of 3) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp808 SDNode *RegOpnd; local
816 RegOpnd = CurDAG->getMachineNode(Inst->Opc, DL, MVT::i64, ImmOpnd);
818 RegOpnd =
827 RegOpnd = CurDAG->getMachineNode(Inst->Opc, DL, MVT::i64,
828 SDValue(RegOpnd, 0), ImmOpnd);
831 ReplaceNode(Node, RegOpnd);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp7644 MipsOperand &RegOpnd = static_cast<MipsOperand &>(*Reg[0]); local
7645 if (!RegOpnd.isGPRAsmReg()) {
7646 reportParseError(RegOpnd.getStartLoc(), "invalid register");
7657 getTargetStreamer().emitDirectiveCpAdd(RegOpnd.getGPR32Reg());
7677 MipsOperand &RegOpnd = static_cast<MipsOperand &>(*Reg[0]); local
7678 if (!RegOpnd.isGPRAsmReg()) {
7679 reportParseError(RegOpnd.getStartLoc(), "invalid register");
7689 getTargetStreamer().emitDirectiveCpLoad(RegOpnd.getGPR32Reg());
7706 MipsOperand &RegOpnd = static_cast<MipsOperand &>(*Reg[0]); local
7707 if (!RegOpnd
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp6918 TargetInstrInfo::RegSubRegPair getRegOrUndef(const MachineOperand &RegOpnd) { argument
6919 assert(RegOpnd.isReg());
6920 return RegOpnd.isUndef() ? TargetInstrInfo::RegSubRegPair() :
6921 getRegSubRegPair(RegOpnd);

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