| /freebsd-13-stable/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/ |
| H A D | RegisterFile.cpp | 150 MCPhysReg RegID = WS.getRegisterID(); local
151 assert(RegID && "Adding an invalid register definition?");
155 << ", " << MRI.getName(RegID) << "]\n";
158 // If RenameAs is equal to RegID, then RegID is subject to register renaming
159 // and false dependencies on RegID are all eliminated.
164 // cases, RenameAs must be either equal to RegID, or it must reference a
165 // super-register of RegID.
167 // If RenameAs is a super-register of RegID, then a write to RegID ha
358 MCPhysReg RegID = RS.getRegisterID(); local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/MCA/ |
| H A D | Instruction.cpp | 21 void WriteState::writeStartEvent(unsigned IID, MCPhysReg RegID, argument
24 CRD.RegID = RegID;
30 void ReadState::writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles) { argument
42 CRD.RegID = RegID;
125 dbgs() << "{ OpIdx=" << WD->OpIndex << ", Lat=" << getLatency() << ", RegID "
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| H A D | InstrBuilder.cpp | 627 MCPhysReg RegID = 0;
635 RegID = Op.getReg();
638 RegID = RD.RegisterID;
642 if (!RegID)
646 NewIS->getUses().emplace_back(RD, RegID);
686 RegID = WD.isImplicitWrite() ? WD.RegisterID
689 if (WD.IsOptionalDef && !RegID) {
694 assert(RegID && "Expected a valid register ID!");
695 NewIS->getDefs().emplace_back(WD, RegID,
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| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MCA/ |
| H A D | Instruction.h | 86 /// Field RegID is set to the invalid register for memory dependencies.
89 MCPhysReg RegID; member in struct:llvm::mca::CriticalDependency
150 WriteState(const WriteDescriptor &Desc, MCPhysReg RegID, argument
152 : WD(&Desc), CyclesLeft(UNKNOWN_CYCLES), RegisterID(RegID), PRFID(0),
204 void writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles);
257 ReadState(const ReadDescriptor &Desc, MCPhysReg RegID) argument
258 : RD(&Desc), RegisterID(RegID), PRFID(0), DependentWrites(0),
276 void writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles);
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| /freebsd-13-stable/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
| H A D | BottleneckAnalysis.h | 251 void addRegisterDep(unsigned From, unsigned To, unsigned RegID, argument
253 addDependency(From, To, {DependencyEdge::DT_REGISTER, RegID, Cost});
316 void addRegisterDep(unsigned From, unsigned To, unsigned RegID, unsigned Cy);
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| H A D | BottleneckAnalysis.cpp | 462 unsigned RegID, unsigned Cost) {
466 DG.addRegisterDep(From, To + SourceSize, RegID, Cost);
467 DG.addRegisterDep(From + SourceSize, To + (SourceSize * 2), RegID, Cost);
470 DG.addRegisterDep(From + SourceSize, To + SourceSize, RegID, Cost);
530 addRegisterDep(From, To, RegDep.RegID, Cycles);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 431 auto ClearsSuperReg = [=](unsigned RegID) {
436 if (GR32RC.contains(RegID))
447 return VR128XRC.contains(RegID) || VR256XRC.contains(RegID);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 6261 auto RegID = IntrinsicID == Intrinsic::amdgcn_dispatch_ptr ? local
6263 return getPreloadedValue(DAG, *MFI, VT, RegID);
|