| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiDelaySlotFiller.cpp | 66 SmallSet<unsigned, 32> &RegDefs,
72 bool &SawStore, SmallSet<unsigned, 32> &RegDefs,
147 SmallSet<unsigned, 32> RegDefs; local
150 insertDefsUses(Slot, RegDefs, RegUses);
168 if (delayHasHazard(FI, SawLoad, SawStore, RegDefs, RegUses)) {
169 insertDefsUses(FI, RegDefs, RegUses);
179 bool &SawStore, SmallSet<unsigned, 32> &RegDefs,
212 if (isRegInSet(RegDefs, Reg) || isRegInSet(RegUses, Reg))
217 if (isRegInSet(RegDefs, Reg))
224 // Insert Defs and Uses of MI into the sets RegDefs an
178 delayHasHazard(MachineBasicBlock::instr_iterator MI, bool &SawLoad, bool &SawStore, SmallSet<unsigned, 32> &RegDefs, SmallSet<unsigned, 32> &RegUses) argument
225 insertDefsUses(MachineBasicBlock::instr_iterator MI, SmallSet<unsigned, 32> &RegDefs, SmallSet<unsigned, 32> &RegUses) argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 68 SmallSet<unsigned, 32>& RegDefs,
72 SmallSet<unsigned, 32>& RegDefs,
80 SmallSet<unsigned, 32> &RegDefs,
170 SmallSet<unsigned, 32> RegDefs; local
195 insertCallDefsUses(slot, RegDefs, RegUses);
197 insertDefsUses(slot, RegDefs, RegUses);
217 if (delayHasHazard(I, sawLoad, sawStore, RegDefs, RegUses)) {
218 insertDefsUses(I, RegDefs, RegUses);
230 SmallSet<unsigned, 32> &RegDefs,
260 if (IsRegInSet(RegDefs, Re
227 delayHasHazard(MachineBasicBlock::iterator candidate, bool &sawLoad, bool &sawStore, SmallSet<unsigned, 32> &RegDefs, SmallSet<unsigned, 32> &RegUses) argument
289 insertCallDefsUses(MachineBasicBlock::iterator MI, SmallSet<unsigned, 32>& RegDefs, SmallSet<unsigned, 32>& RegUses) argument
318 insertDefsUses(MachineBasicBlock::iterator MI, SmallSet<unsigned, 32>& RegDefs, SmallSet<unsigned, 32>& RegUses) argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineDebugify.cpp | 118 SmallVector<MachineOperand *, 4> RegDefs; local
121 RegDefs.push_back(&MO);
122 for (MachineOperand *MO : RegDefs)
127 if (RegDefs.empty()) {
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHazardRecognizer.cpp | 35 RegDefs.clear();
51 if (!MO.isReg() || RegDefs.count(MO.getReg()) == 0)
87 RegDefs.clear();
117 RegDefs.insert(MO.getReg());
|
| H A D | HexagonHazardRecognizer.h | 41 SmallSet<unsigned, 8> RegDefs; member in class:llvm::HexagonHazardRecognizer
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/MCA/Stages/ |
| H A D | DispatchStage.cpp | 47 SmallVector<MCPhysReg, 4> RegDefs; local
49 RegDefs.emplace_back(RegDef.getRegisterID());
51 const unsigned RegisterMask = PRF.isAvailable(RegDefs);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILoadStoreOptimizer.cpp | 601 DenseSet<Register> &RegDefs,
606 RegDefs.insert(Op.getReg());
624 static bool addToListsIfDependent(MachineInstr &MI, DenseSet<Register> &RegDefs, argument
637 ((Use.readsReg() && RegDefs.count(Use.getReg())) ||
638 (Use.isDef() && RegDefs.count(Use.getReg())) ||
642 addDefsUsesToList(MI, RegDefs, PhysRegUses);
600 addDefsUsesToList(const MachineInstr &MI, DenseSet<Register> &RegDefs, DenseSet<Register> &PhysRegUses) argument
|