/freebsd-13-stable/crypto/openssl/crypto/md5/ |
H A D | md5_dgst.c | 141 R3(A, B, C, D, X(0), 6, 0xf4292244L); 142 R3(D, A, B, C, X(7), 10, 0x432aff97L); 143 R3(C, D, A, B, X(14), 15, 0xab9423a7L); 144 R3(B, C, D, A, X(5), 21, 0xfc93a039L); 145 R3(A, B, C, D, X(12), 6, 0x655b59c3L); 146 R3(D, A, B, C, X(3), 10, 0x8f0ccc92L); 147 R3(C, D, A, B, X(10), 15, 0xffeff47dL); 148 R3(B, C, D, A, X(1), 21, 0x85845dd1L); 149 R3(A, B, C, D, X(8), 6, 0x6fa87e4fL); 150 R3( [all...] |
H A D | md5_local.h | 77 #define R3(a,b,c,d,k,s,t) { \ macro
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/freebsd-13-stable/contrib/wpa/src/crypto/ |
H A D | sha1-internal.c | 143 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */ 152 #define R3(v,w,x,y,z,i) \ macro 208 R3(a,b,c,d,e,40); R3(e,a,b,c,d,41); R3(d,e,a,b,c,42); R3(c,d,e,a,b,43); 209 R3(b,c,d,e,a,44); R3(a,b,c,d,e,45); R3(e,a,b,c,d,46); R3( [all...] |
/freebsd-13-stable/contrib/ldns/ |
H A D | sha1.c | 37 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */ 41 #define R3(v,w,x,y,z,i) z+=(((w|x)&y)|(w&x))+blk(i)+0x8F1BBCDC+rol(v,5);w=rol(w,30); macro 81 R3(a,b,c,d,e,40); R3(e,a,b,c,d,41); R3(d,e,a,b,c,42); R3(c,d,e,a,b,43); 82 R3(b,c,d,e,a,44); R3(a,b,c,d,e,45); R3(e,a,b,c,d,46); R3( [all...] |
/freebsd-13-stable/crypto/openssh/openbsd-compat/ |
H A D | sha1.c | 40 * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1 45 #define R3(v,w,x,y,z,i) z+=(((w|x)&y)|(w&x))+blk(i)+0x8F1BBCDC+rol(v,5);w=rol(w,30); macro 83 R3(a,b,c,d,e,40); R3(e,a,b,c,d,41); R3(d,e,a,b,c,42); R3(c,d,e,a,b,43); 84 R3(b,c,d,e,a,44); R3(a,b,c,d,e,45); R3(e,a,b,c,d,46); R3( [all...] |
/freebsd-13-stable/crypto/openssl/crypto/md5/asm/ |
H A D | md5-586.pl | 35 %Ltmp1=("R0",&Np($C), "R1",&Np($C), "R2",&Np($C), "R3",&Np($D)); 40 0, 7, 14, 5, 12, 3, 10, 1, 8, 15, 6, 13, 4, 11, 2, 9, # R3 152 sub R3 subroutine 156 &comment("R3 $ki"); 268 &comment("R3 section"); 269 &R3(-1,$A,$B,$C,$D,$X,48, 6,0xf4292244); 270 &R3( 0,$D,$A,$B,$C,$X,49,10,0x432aff97); 271 &R3( 0,$C,$D,$A,$B,$X,50,15,0xab9423a7); 272 &R3( 0,$B,$C,$D,$A,$X,51,21,0xfc93a039); 273 &R3( [all...] |
H A D | md5-sparcv9.pl | 177 sub R3 { subroutine 350 for (;$i<64;$i++) { &R3($i,@V); unshift(@V,pop(@V)); }
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/freebsd-13-stable/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/ |
H A D | fastmath2_ldlib_asm.S | 54 #define mantb R3:2 55 #define lmantb R3:2 64 #define zero R3:2 153 #define mantb R3:2 154 #define lmantb R3:2 163 #define zero R3:2 258 #define mantbh R3 259 #define mantb R3:2
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H A D | fastmath_dlib_asm.S | 61 #define mantexpb R3:2 62 #define lmantb R3:2 74 #define minus R3:2 196 #define mantexpb R3:2 197 #define lmantb R3:2 209 #define minus R3:2 325 #define mantbh R3 326 #define mantexpb R3:2 336 #define minus1 R3:2
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H A D | fastmath2_dlib_asm.S | 59 #define mantexpb R3:2 60 #define lmantb R3:2 160 #define mantexpb R3:2 161 #define lmantb R3:2 261 #define mantbh R3 262 #define mantexpb R3:2 374 #define mant R3 456 #define mag R3
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCCallingConv.cpp | 37 PPC::R3, PPC::R4, PPC::R5, PPC::R6, 62 PPC::R3, PPC::R4, PPC::R5, PPC::R6, 114 static const MCPhysReg HiRegList[] = { PPC::R3, PPC::R5, PPC::R7, PPC::R9 }; 137 // Same as above, but for return values, so only allocate for R3 and R4 143 static const MCPhysReg HiRegList[] = { PPC::R3 };
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H A D | PPCTLSDynamicCall.cpp | 81 Register GPR3 = Is64Bit ? PPC::X3 : PPC::R3;
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/freebsd-13-stable/contrib/ntp/lib/isc/ |
H A D | sha1.c | 105 * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1 116 #define R3(v,w,x,y,z,i) \ macro 143 #define nR3(v,w,x,y,z,i) R3(*v,*w,*x,*y,*z,i) 238 R3(a,b,c,d,e,40); R3(e,a,b,c,d,41); R3(d,e,a,b,c,42); R3(c,d,e,a,b,43); 239 R3(b,c,d,e,a,44); R3(a,b,c,d,e,45); R3( [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiBaseInfo.h | 49 case Lanai::R3:
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 24 static const MCPhysReg RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; 66 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; 68 static const MCPhysReg GPRArgRegs[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; 73 // If we had R3 unallocated only, now we still must to waste it. 75 assert((!Reg || Reg == ARM::R3) && "Wrong GPRs usage for f64"); 117 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; 153 static const MCPhysReg RRegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 };
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H A D | ARMBaseRegisterInfo.h | 47 case R0: case R1: case R2: case R3:
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H A D | Thumb1FrameLowering.cpp | 285 case ARM::R3: 844 for (unsigned ArgReg : {ARM::R0, ARM::R1, ARM::R2, ARM::R3}) 875 ARM::R5, ARM::R4, ARM::R3, 975 CopyRegs[ARM::R3] = true; 982 static const unsigned AllCopyRegs[] = {ARM::R0, ARM::R1, ARM::R2, ARM::R3,
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/freebsd-13-stable/crypto/openssl/crypto/poly1305/asm/ |
H A D | poly1305-armv4.pl | 448 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("d$_",(0..9)); 486 vdup.32 $R3,r5 505 vmull.u32 $D3,$R3,${R0}[1] 512 vmlal.u32 $D4,$R3,${R1}[1] 514 vmlal.u32 $D0,$R3,${S2}[1] 521 vmlal.u32 $D3,$R0,${R3}[1] 522 vmlal.u32 $D1,$R3,${S3}[1] 524 vmlal.u32 $D4,$R1,${R3}[1] 529 vmlal.u32 $D2,$R3,${S4}[1] 557 @ H4 = H4*R0 + H3*R1 + H2*R2 + H1*R3 [all...] |
H A D | poly1305-armv8.pl | 214 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8)); 500 ld1 {$S2,$R3,$S3,$R4},[x15],#64 558 umull $ACC3,$IN23_0,${R3}[2] 571 umlal $ACC4,$IN23_1,${R3}[2] 637 umlal $ACC3,$IN01_0,${R3}[0] 651 umlal $ACC4,$IN01_1,${R3}[0] 752 umlal2 $ACC3,$IN23_0,${R3} 760 umlal2 $ACC4,$IN23_1,${R3} 789 umlal $ACC3,$IN01_0,${R3} 798 umlal $ACC4,$IN01_1,${R3} [all...] |
H A D | poly1305-c64xplus.pl | 35 ($R0,$R1,$R2,$R3,$S1,$S2,$S3,$S3b)=("A0","B0","A1","B1","A12","B12","A13","B13"); 129 || LDDW *${S3b}[4],$R3:$R1 ; load r3:r1 155 || MPY32U B27,$R3,B19:B18 ; MPY32U $H0,$R3,B19:B18
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H A D | poly1305-x86_64.pl | 2131 my ($R0,$R1,$R2,$R3,$R4, $S1,$S2,$S3,$S4) = map("%zmm$_",(16..24)); 2182 vmovdqu `16*5-64`($ctx),%x#$D3 # ... ${R3} 2196 vpermd $D3,$T2,$R3 2203 vmovdqu64 $R3,0x80(%rsp,%rax){%k2} 2220 vpmuludq $T0,$R3,$D3 # d3 = r0'*r3 2228 vpmuludq $T1,$R3,$M4 2229 vpsrlq \$32,$R3,$T3 2329 vpermd $R3,$M0,$R3 2335 vpermd $D3,$M0,${R3}{ [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 51 R == Hexagon::R3 || R == Hexagon::D0 || R == Hexagon::D1; 60 R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, 0 117 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMBaseInfo.h | 163 case R0: case R1: case R2: case R3:
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/ |
H A D | BPFDisassembler.cpp | 97 BPF::R0, BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
H A D | LanaiDisassembler.cpp | 156 Lanai::R0, Lanai::R1, Lanai::PC, Lanai::R3, Lanai::SP, Lanai::FP,
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