| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 75 bool expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, BlockIt MBBI);
142 expandArith(unsigned OpLo, unsigned OpHi, Block &MBB, BlockIt MBBI) {
154 buildMI(MBB, MBBI, OpLo)
336 unsigned OpLo = AVR::SBCIRdK; local
340 auto MIBLO = buildMI(MBB, MBBI, OpLo)
396 unsigned OpLo = AVR::COMRd; local
400 auto MIBLO = buildMI(MBB, MBBI, OpLo)
427 unsigned OpLo = AVR::CPRdRr; local
433 buildMI(MBB, MBBI, OpLo)
460 unsigned OpLo local
492 unsigned OpLo = AVR::LDIRdK; local
541 unsigned OpLo = AVR::LDSRdK; local
587 unsigned OpLo = AVR::LDRdPtr; local
636 unsigned OpLo = AVR::LDRdPtrPi; local
667 unsigned OpLo = AVR::LDRdPtrPd; local
699 unsigned OpLo = AVR::LDDRdPtrQ; local
753 unsigned OpLo = AVR::LPMRdZPi; local
974 unsigned OpLo = AVR::STSKRr; local
1021 unsigned OpLo = AVR::STPtrRr; local
1051 unsigned OpLo = AVR::STPtrPiRr; local
1085 unsigned OpLo = AVR::STPtrPdRr; local
1119 unsigned OpLo = AVR::STDPtrQRr; local
1151 unsigned OpLo = AVR::INRdA; local
1181 unsigned OpLo = AVR::OUTARr; local
1212 unsigned OpLo = AVR::PUSHRr; local
1236 unsigned OpLo = AVR::POPRd; local
1342 unsigned OpLo = AVR::ADDRdRr; // ADD Rd, Rd <==> LSL Rd local
1375 unsigned OpLo = AVR::RORRd; local
1418 unsigned OpLo = AVR::RORRd; local
1543 unsigned OpLo = AVR::INRdA; local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1309 SDValue OpLo = Op; local
1317 GetSplitVector(Op, OpLo, OpHi);
1319 std::tie(OpLo, OpHi) = DAG.SplitVectorOperand(N, i);
1322 OpsLo[i] = OpLo;
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 1969 const MachineOperand &OpLo = LoIs1 ? MI.getOperand(1) : MI.getOperand(3); local
1972 RegisterSubReg SrcRL(OpLo), SrcRH(OpHi);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 4336 SDValue OpLo = DAG.getNode(Opc, SL, Lo.getValueType(), Lo, local
4341 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi);
4359 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, local
4364 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi);
4382 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, Lo2, local
4387 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi);
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 20242 SDValue OpLo = DAG.getNode(ExtendInVecOpc, dl, HalfVT, In);
20248 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpLo);
20256 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi);
20619 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i64, In,
20623 OpLo = DAG.getBitcast(MVT::v4i32, OpLo);
20626 return DAG.getVectorShuffle(VT, DL, OpLo, OpHi, ShufMask);
20649 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v4i32, In,
20655 OpLo
[all...] |