Searched refs:Op1Reg (Results 1 - 7 of 7) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CmovConversion.cpp | 816 Register Op1Reg = MIIt->getOperand(1).getReg(); local
823 std::swap(Op1Reg, Op2Reg);
825 auto Op1Itr = RegRewriteTable.find(Op1Reg);
827 Op1Reg = Op1Itr->second.first;
837 .addReg(Op1Reg)
846 RegRewriteTable[DestReg] = std::make_pair(Op1Reg, Op2Reg);
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| H A D | X86InstructionSelector.cpp | 1088 const Register Op1Reg = I.getOperand(3).getReg(); local
1126 .addReg(Op1Reg);
1530 const Register Op1Reg = I.getOperand(1).getReg(); local
1534 assert(RegTy == MRI.getType(Op1Reg) && RegTy == MRI.getType(Op2Reg) &&
1637 if (!RBI.constrainGenericRegister(Op1Reg, *RegRC, MRI) ||
1648 .addReg(Op1Reg);
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| H A D | X86FastISel.cpp | 1409 Register Op1Reg = getRegForValue(Op1);
1410 if (Op1Reg == 0) return false;
1413 .addReg(Op1Reg);
1822 Register Op1Reg = getRegForValue(I->getOperand(1));
1823 if (Op1Reg == 0) return false;
1825 CReg).addReg(Op1Reg);
1931 Register Op1Reg = getRegForValue(I->getOperand(1));
1932 if (Op1Reg == 0)
1968 TII.get(OpEntry.OpDivRem)).addReg(Op1Reg);
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| H A D | X86ISelLowering.cpp | [all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 263 unsigned Op1Reg, bool Op1IsKill);
267 unsigned Op1Reg, bool Op1IsKill);
271 unsigned Op1Reg, bool Op1IsKill);
4086 unsigned Op1Reg, bool Op1IsKill) {
4101 Op1Reg = emitAnd_ri(MVT::i32, Op1Reg, Op1IsKill, Mask);
4104 unsigned ResultReg = fastEmitInst_rr(Opc, RC, Op0Reg, Op0IsKill, Op1Reg,
4192 unsigned Op1Reg, bool Op1IsKill) {
4208 Op1Reg = emitAnd_ri(MVT::i32, Op1Reg, Op1IsKil
4085 emitLSL_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill, unsigned Op1Reg, bool Op1IsKill) argument
4191 emitLSR_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill, unsigned Op1Reg, bool Op1IsKill) argument
4312 emitASR_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill, unsigned Op1Reg, bool Op1IsKill) argument
4820 unsigned Op1Reg = getRegForValue(I->getOperand(1)); local
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 1612 unsigned Op1Reg = getRegForValue(I->getOperand(1)); local
1613 if (Op1Reg == 0) return false;
1658 Op1Reg = constrainOperandRegClass(TII.get(MovCCOpc), Op1Reg, 2);
1662 .addReg(Op1Reg)
1666 Op1Reg = constrainOperandRegClass(TII.get(MovCCOpc), Op1Reg, 1);
1669 .addReg(Op1Reg)
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 2012 unsigned Op1Reg = getRegForValue(I->getOperand(1)); local
2013 if (!Op1Reg)
2030 emitInst(Opcode, ResultReg).addReg(Op0Reg).addReg(Op1Reg);
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