Searched refs:NumArgRegs (Results 1 - 4 of 4) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.cpp40 const unsigned NumArgRegs = array_lengthof(ArgRegs); local
48 if (RegNum != NumArgRegs && RegNum % 2 == 1) {
65 const unsigned NumArgRegs = array_lengthof(ArgRegs); local
68 int RegsLeft = NumArgRegs - RegNum;
72 if (RegNum != NumArgRegs && RegsLeft < 4) {
91 const unsigned NumArgRegs = array_lengthof(ArgRegs); local
97 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp301 unsigned NumArgRegs =
303 if (!NumArgRegs)
305 j += NumArgRegs;
320 unsigned NumArgRegs = Args[i].Regs.size();
321 if (NumArgRegs < 2)
324 assert((j + (NumArgRegs - 1)) < ArgLocs.size() &&
326 for (unsigned Part = 0; Part < NumArgRegs; ++Part) {
331 j += NumArgRegs - 1;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp144 const unsigned NumArgRegs = array_lengthof(ArgRegs); local
148 if (RegNum != NumArgRegs && RegNum % 2 == 1)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp1798 unsigned NumArgRegs) {
1796 allocateSGPR32InputImpl(CCState &CCInfo, const TargetRegisterClass *RC, unsigned NumArgRegs) argument

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