| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegAllocGreedy.cpp | 492 SmallVectorImpl<Register> &NewVRegs);
497 SmallVectorImpl<Register> &NewVRegs);
757 SmallVectorImpl<Register> &NewVRegs,
777 evictInterference(VirtReg, Hint, NewVRegs);
794 Register CheapReg = tryEvict(VirtReg, Order, NewVRegs, Cost, FixedRegisters);
1042 SmallVectorImpl<Register> &NewVRegs) {
1081 NewVRegs.push_back(Intf->reg);
1101 SmallVectorImpl<Register> &NewVRegs,
1166 evictInterference(VirtReg, BestPhys, NewVRegs);
1812 SmallVectorImpl<Register> &NewVRegs) {
755 tryAssign(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<Register> &NewVRegs, const SmallVirtRegSet &FixedRegisters) argument
1041 evictInterference(LiveInterval &VirtReg, Register PhysReg, SmallVectorImpl<Register> &NewVRegs) argument
1099 tryEvict(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<Register> &NewVRegs, unsigned CostPerUseLimit, const SmallVirtRegSet &FixedRegisters) argument
1811 tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<Register> &NewVRegs) argument
1954 doRegionSplit(LiveInterval &VirtReg, unsigned BestCand, bool HasCompact, SmallVectorImpl<Register> &NewVRegs) argument
2001 tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<Register> &NewVRegs) argument
2068 tryInstructionSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<Register> &NewVRegs) argument
2211 tryLocalSplit(LiveInterval &VirtReg, AllocationOrder &Order, SmallVectorImpl<Register> &NewVRegs) argument
[all...] |
| H A D | RegAllocPBQP.cpp | 640 SmallVector<Register, 8> NewVRegs; local
641 spillVReg(VReg, NewVRegs, MF, LIS, VRM, VRegSpiller);
642 Worklist.insert(Worklist.end(), NewVRegs.begin(), NewVRegs.end());
733 SmallVector<Register, 8> NewVRegs; local
734 spillVReg(VReg, NewVRegs, MF, LIS, VRM, VRegSpiller);
735 AnotherRoundNeeded |= !NewVRegs.empty();
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| H A D | InlineSpiller.cpp | 1465 SmallVector<Register, 4> NewVRegs; local
1466 LiveRangeEdit Edit(nullptr, NewVRegs, MF, LIS, &VRM, this);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | RegisterBankInfo.cpp | 672 StartIdx = NewVRegs.size();
675 NewVRegs.push_back(0);
680 return make_range(&NewVRegs[StartIdx], End);
691 assert((NewVRegs.size() == StartIdx + NumVal ||
692 NewVRegs.size() > StartIdx + NumVal) &&
693 "NewVRegs too small to contain all the partial mapping");
694 return NewVRegs.size() <= StartIdx + NumVal ? NewVRegs.end()
695 : &NewVRegs[StartIdx + NumVal];
727 assert(NewVRegs[OpToNewVRegId
[all...] |
| H A D | RegBankSelect.cpp | 137 const iterator_range<SmallVectorImpl<Register>::const_iterator> &NewVRegs) {
139 assert(ValMapping.NumBreakDowns == (unsigned)size(NewVRegs) &&
143 assert(!NewVRegs.empty() && "We should not have to repair");
150 Register Dst = *NewVRegs.begin();
197 for (Register SrcReg : NewVRegs)
204 for (Register DefReg : NewVRegs)
134 repairReg( MachineOperand &MO, const RegisterBankInfo::ValueMapping &ValMapping, RegBankSelect::RepairingPlacement &RepairPt, const iterator_range<SmallVectorImpl<Register>::const_iterator> &NewVRegs) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | RegisterBankInfo.h | 280 /// The OpIdx-th cell contains the index in NewVRegs where the VRegs of the
286 SmallVector<Register, 8> NewVRegs; member in class:llvm::RegisterBankInfo::OperandsMapper
301 /// Get the range in NewVRegs to store all the partial
311 /// spannig \p NumVal in NewVRegs.
312 /// \pre StartIdx + NumVal <= NewVRegs.size()
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| H A D | RegBankSelect.h | 532 /// \p NewVRegs contains all the registers required to remap \p Reg.
533 /// In other words, the number of registers in NewVRegs must be equal
556 /// \pre NewVRegs.size() == ValMapping.BreakDown.size()
566 &NewVRegs);
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