Searched refs:MaxVGPRs (Results 1 - 6 of 6) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUPromoteAlloca.cpp94 unsigned MaxVGPRs; member in class:__anon3929::AMDGPUPromoteAlloca
139 unsigned MaxVGPRs; member in class:__anon3929::AMDGPUPromoteAllocaToVector
200 MaxVGPRs = ST.getMaxNumVGPRs(ST.getWavesPerEU(F).first);
202 MaxVGPRs = 128;
429 unsigned MaxVGPRs) {
446 : (MaxVGPRs * 32);
450 << MaxVGPRs << " registers available\n");
836 if (tryPromoteAllocaToVector(&I, DL, MaxVGPRs))
1058 MaxVGPRs = ST.getMaxNumVGPRs(ST.getWavesPerEU(F).first);
1060 MaxVGPRs
428 tryPromoteAllocaToVector(AllocaInst *Alloca, const DataLayout &DL, unsigned MaxVGPRs) argument
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H A DSIFormMemoryClauses.cpp79 unsigned MaxVGPRs; member in class:__anon3973::SIFormMemoryClauses
255 MaxPressure.getVGPRNum() <= MaxVGPRs &&
321 MaxVGPRs = TRI->getAllocatableSet(MF, &AMDGPU::VGPR_32RegClass).count();
H A DAMDGPUTargetTransformInfo.h80 unsigned MaxVGPRs; member in class:llvm::final
141 MaxVGPRs(ST->getMaxNumVGPRs(
H A DGCNSchedStrategy.cpp373 unsigned MaxVGPRs = ST.getMaxNumVGPRs(MF); local
375 if (PressureAfter.getVGPRNum() > MaxVGPRs ||
H A DAMDGPUTargetTransformInfo.cpp246 return MaxVGPRs;
H A DSIInstrInfo.cpp696 unsigned MaxVGPRs = RI.getRegPressureLimit(&AMDGPU::VGPR_32RegClass, local
711 if (!Tmp2 || RI.getHWRegIndex(Tmp2) >= MaxVGPRs)

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