/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCTLSDynamicCall.cpp | 79 Register InReg = MI.getOperand(1).getReg(); local 83 const Register OrigRegs[] = {OutReg, InReg, GPR3}; 118 .addReg(InReg);
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/freebsd-13-stable/contrib/llvm-project/clang/include/clang/CodeGen/ |
H A D | CGFunctionInfo.h | 95 bool InReg : 1; // isDirect() || isExtend() || isIndirect() 117 InReg(false), CanBeFlattened(false), SignExt(false) {} 331 return InReg; 336 InReg = IR;
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | FastISel.h | 109 IsInReg = Call.hasRetAttr(Attribute::InReg); 133 IsInReg = Call.hasRetAttr(Attribute::InReg);
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H A D | TargetLowering.h | 3740 IsInReg = Call.hasRetAttr(Attribute::InReg);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUCallLowering.cpp | 700 const bool InReg = Arg.hasAttribute(Attribute::InReg); local 703 if (!IsShader && InReg) 711 if (CC == CallingConv::AMDGPU_PS && !InReg && PSInputNum <= 15) {
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H A D | AMDGPUMachineCFGStructurizer.cpp | 2739 unsigned InReg = LRegion->getBBSelectRegIn(); 2741 MRI->createVirtualRegister(MRI->getRegClass(InReg)); 2742 Register NewInReg = MRI->createVirtualRegister(MRI->getRegClass(InReg)); 2747 LRegion->replaceRegisterInsideRegion(InReg, InnerSelectReg, false, MRI);
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H A D | AMDGPUTargetTransformInfo.cpp | 718 return F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::InReg) ||
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H A D | AMDGPUInstructionSelector.cpp | 1841 bool InReg = I.getOpcode() == AMDGPU::G_SEXT_INREG; local 1842 bool Signed = I.getOpcode() == AMDGPU::G_SEXT || InReg; 1887 const TargetRegisterClass &SrcRC = InReg && DstSize > 32 ? 1905 if (DstSize > 32 && (SrcSize <= 32 || InReg)) { 1909 unsigned SubReg = InReg ? AMDGPU::sub0 : 0;
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H A D | AMDGPUAsmPrinter.cpp | 1031 if (Arg.hasAttribute(Attribute::InReg))
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 334 Register InReg = MI.getOperand(1).getReg(); local 370 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); 371 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); 381 Tmp0 = InReg; 383 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); 391 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); 407 BuildMI(FalseMBB, DL, TII.get(LoweredOpcode), FalseReg).addReg(InReg);
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/freebsd-13-stable/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | TargetInfo.cpp | 666 "Unexpected InReg seen in arginfo in generic VAArg emitter!"); 1142 bool shouldAggregateUseDirect(QualType Ty, CCState &State, bool &InReg, 1678 bool &InReg, 1687 InReg = !IsMCUABI; 1809 bool InReg; local 1810 if (shouldAggregateUseDirect(Ty, State, InReg, NeedsPadding)) { 1814 if (InReg) 1871 bool InReg = shouldPrimitiveUseInReg(Ty, State); local 1874 if (InReg) 1881 if (InReg) 1677 shouldAggregateUseDirect(QualType Ty, CCState &State, bool &InReg, bool &NeedsPadding) const argument [all...] |
H A D | CGCall.cpp | 2087 RetAttrs.addAttribute(llvm::Attribute::InReg); 2131 SRETAttrs.addAttribute(llvm::Attribute::InReg); 2159 llvm::AttrBuilder().addAttribute(llvm::Attribute::InReg)); 2177 Attrs.addAttribute(llvm::Attribute::InReg); 2182 Attrs.addAttribute(llvm::Attribute::InReg);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 90 if (Attrs.hasAttribute(OpIdx, Attribute::InReg))
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86CallLowering.cpp | 347 Arg.hasAttribute(Attribute::InReg) ||
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H A D | X86WinEHState.cpp | 415 Call->addParamAttr(0, Attribute::InReg);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
H A D | AMDGPUBaseInfo.cpp | 1316 return F->getAttributes().hasParamAttribute(A->getArgNo(), Attribute::InReg) ||
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/IR/ |
H A D | Attributes.cpp | 352 if (hasAttribute(Attribute::InReg))
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H A D | Function.cpp | 201 return hasAttribute(Attribute::InReg);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | CodeExtractor.cpp | 868 case Attribute::InReg:
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Coroutines/ |
H A D | CoroSplit.cpp | 1019 Attribute::Preallocated, Attribute::InReg, Attribute::Returned,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 1403 Register InReg = It->second; local 1406 DAG.getDataLayout(), InReg, Ty, 1598 unsigned InReg = FuncInfo.InitializeRegForValue(Inst); local 1600 RegsForValue RFV(*DAG.getContext(), TLI, DAG.getDataLayout(), InReg, 1877 AttributeList::ReturnIndex, Attribute::InReg); 2577 if (GuardCheckFn->hasAttribute(1, Attribute::AttrKind::InReg)) 9026 Attrs.push_back(Attribute::InReg); 9195 // passed InReg - is surely an HVA 9203 // Set InReg Flag 9708 if (Arg.hasAttribute(Attribute::InReg)) { [all...] |
H A D | FastISel.cpp | 1109 Attrs.push_back(Attribute::InReg);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 2352 if (CI->paramHasAttr(ArgIdx, Attribute::InReg) || 3026 if (Arg.hasAttribute(Attribute::InReg) ||
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 1552 if (attr.hasAttribute(AttributeList::ReturnIndex, Attribute::InReg))
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 1351 if (FormalArg.hasAttribute(Attribute::InReg) ||
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