Searched refs:ImmOp (Results 1 - 25 of 34) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonOptAddrMode.cpp107 bool changeStore(MachineInstr *OldMI, MachineOperand ImmOp,
109 bool changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum);
111 const MachineOperand &ImmOp, unsigned ImmOpNum);
413 const MachineOperand ImmOp = AddMI->getOperand(2); local
425 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm());
483 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, argument
502 MIB.add(ImmOp);
511 const GlobalValue *GV = ImmOp.getGlobal();
512 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm();
514 MIB.addGlobalAddress(GV, Offset, ImmOp
544 changeStore(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum) argument
604 changeAddAsl(NodeAddr<UseNode *> AddAslUN, MachineInstr *AddAslMI, const MachineOperand &ImmOp, unsigned ImmOpNum) argument
672 const MachineOperand ImmOp = TfrMI->getOperand(1); local
[all...]
H A DHexagonAsmPrinter.cpp255 MCOperand &ImmOp = Inst.getOperand(i); local
256 const auto *HE = static_cast<const HexagonMCExpr*>(ImmOp.getExpr());
H A DHexagonConstExtenders.cpp1780 const MachineOperand &ImmOp = MI.getOperand(IsAddi ? 2 : 1); local
1781 assert(Ex.Rs == RegOp && EV == ImmOp && Ex.Neg != IsAddi &&
1897 MachineOperand &ImmOp = P.first->getOperand(J+1); local
1898 ImmOp.setImm(ImmOp.getImm() + Diff);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineDebugify.cpp128 auto ImmOp = MachineOperand::CreateImm(NextImm++); local
130 /*IsIndirect=*/false, ImmOp, LocalVar, Expr);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp244 MachineOperand &ImmOp = LoADDI.getOperand(2); local
245 ImmOp.setOffset(Offset);
246 Tail.addOperand(ImmOp);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp123 const MachineOperand &ImmOp = DefInst->getOperand(2); local
124 if (!ImmOp.isImm() || ImmOp.getImm() != 0)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallFrameOptimization.cpp291 MachineOperand ImmOp = MI->getOperand(X86::AddrNumOperands); local
292 return ImmOp.getImm() == 0 ? Convert : Exit;
297 MachineOperand ImmOp = MI->getOperand(X86::AddrNumOperands); local
298 return ImmOp.getImm() == -1 ? Convert : Exit;
H A DX86MCInstLower.cpp320 unsigned ImmOp = Inst.getNumOperands() - 1; local
322 (Inst.getOperand(ImmOp).isImm() || Inst.getOperand(ImmOp).isExpr()) &&
334 MCOperand Saved = Inst.getOperand(ImmOp);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumbRegisterInfo.cpp393 MachineOperand &ImmOp = MI.getOperand(ImmIdx);
400 ImmOp.ChangeToImmediate(ImmedOffset);
417 ImmOp.ChangeToImmediate(0);
421 ImmOp.ChangeToImmediate(ImmedOffset);
H A DARMBaseInstrInfo.h798 unsigned ImmOp; local
801 ImmOp = 2;
805 ImmOp = 2;
810 ImmOp = 3;
816 return Scale * MI.getOperand(ImmOp).getImm();
H A DThumb2InstrInfo.cpp654 MachineOperand &ImmOp = MI.getOperand(FrameRegIdx+1);
681 ImmOp.ChangeToImmediate(ImmedOffset);
699 ImmOp.ChangeToImmediate(ImmedOffset);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp241 SDValue ImmOp = Op->getOperand(1); local
242 ConstantSDNode *ImmNode = dyn_cast<ConstantSDNode>(ImmOp);
284 Disp = ImmOp;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/AsmParser/
H A DBPFAsmParser.cpp93 struct ImmOp { struct in struct:__anon4071::BPFOperand
101 ImmOp Imm;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp892 MachineOperand ImmOp = MachineOperand::CreateImm(Imm.getSExtValue()); local
893 tryAddToFoldList(FoldList, UseMI, UseOpIdx, &ImmOp, TII);
1015 MachineOperand *ImmOp) {
1019 MI->getOperand(1).ChangeToImmediate(~ImmOp->getImm());
1420 const MachineOperand *ImmOp = nullptr; local
1424 ImmOp = Src0;
1427 ImmOp = Src1;
1432 int OMod = getOModValue(Op, ImmOp->getImm());
1012 tryConstantFoldOp(MachineRegisterInfo &MRI, const SIInstrInfo *TII, MachineInstr *MI, MachineOperand *ImmOp) argument
H A DSIFixSGPRCopies.cpp334 const MachineOperand *ImmOp = local
336 if (!ImmOp->isImm())
353 Imm = ImmOp->getImm();
H A DAMDGPUInstructionSelector.cpp1946 MachineOperand &ImmOp = I.getOperand(1); local
1949 if (ImmOp.isFPImm()) {
1950 const APInt &Imm = ImmOp.getFPImm()->getValueAPF().bitcastToAPInt();
1951 ImmOp.ChangeToImmediate(Imm.getZExtValue());
1952 } else if (ImmOp.isCImm()) {
1953 ImmOp.ChangeToImmediate(ImmOp.getCImm()->getZExtValue());
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h52 struct ImmOp { struct in struct:llvm::final
75 struct ImmOp Imm;
H A DX86AsmParser.cpp2865 const MCExpr *ImmOp = MCConstantExpr::create(ComparisonPredicate, local
2867 Operands.push_back(X86Operand::CreateImm(ImmOp, NameLoc, NameLoc));
2906 const MCExpr *ImmOp = MCConstantExpr::create(ComparisonPredicate, local
2908 Operands.push_back(X86Operand::CreateImm(ImmOp, NameLoc, NameLoc));
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h611 /// Build and insert \p Res = G_SEXT_INREG \p Op, ImmOp
612 MachineInstrBuilder buildSExtInReg(const DstOp &Res, const SrcOp &Op, int64_t ImmOp) { argument
613 return buildInstr(TargetOpcode::G_SEXT_INREG, {Res}, {Op, SrcOp(ImmOp)});
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/
H A DLanaiAsmParser.cpp126 struct ImmOp { struct in struct:__anon4170::LanaiOperand
140 struct ImmOp Imm;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp237 struct ImmOp { struct in class:__anon4304::SparcOperand
250 struct ImmOp Imm;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/
H A DVEAsmParser.cpp173 struct ImmOp { struct in class:__anon4344::VEOperand
200 struct ImmOp Imm;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp2081 MachineOperand &ImmOp = I.getOperand(1); local
2083 ImmOp.ChangeToImmediate(
2084 ImmOp.getFPImm()->getValueAPF().bitcastToAPInt().getZExtValue());
3907 MachineOperand &ImmOp = I.getOperand(1); local
3915 if (ImmOp.getFPImm()->isNullValue())
3919 const APFloat &ImmValAPF = ImmOp.getFPImm()->getValueAPF();
3929 ImmOp.ChangeToImmediate(Imm);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp864 struct ImmOp { struct in class:__anon4201::MipsOperand
880 struct ImmOp Imm;
2864 const MCOperand &ImmOp = Inst.getOperand(1); local
2865 assert(ImmOp.isImm() && "expected immediate operand kind");
2869 if (loadImmediate(ImmOp.getImm(), DstRegOp.getReg(), Mips::NoRegister,
3617 const MCOperand &ImmOp = Inst.getOperand(1); local
3618 assert(ImmOp.isImm() && "expected immediate operand kind");
3647 int64_t ImmValue = ImmOp.getImm();
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp190 struct ImmOp { struct in struct:__anon4249::PPCOperand
205 struct ImmOp Imm;

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