Searched refs:HiOpc (Results 1 - 5 of 5) sorted by relevance
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.h | 101 unsigned LoOpc, unsigned HiOpc,
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| H A D | MipsSEInstrInfo.cpp | 730 unsigned HiOpc,
741 MachineInstrBuilder HiInst = BuildMI(MBB, I, DL, get(HiOpc));
727 expandPseudoMTLoHi(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned LoOpc, unsigned HiOpc, bool HasExplicitDef) const argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 186 unsigned HiOpc = HighRegInst.getOpcode(); local
199 verifyOpc(HiOpc);
202 if (HiOpc == Hexagon::V6_vassign || LoOpc == Hexagon::V6_vassign)
203 return HiOpc == LoOpc;
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 3798 unsigned HiOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; local
3800 BuildMI(*BB, MI, DL, TII->get(HiOpc), DestSub1).add(Src0Sub1).add(Src1Sub1);
3859 unsigned HiOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; local
3861 BuildMI(*BB, MI, DL, TII->get(HiOpc), DestSub1)
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| H A D | SIInstrInfo.cpp | 5866 unsigned HiOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; local
5868 BuildMI(MBB, MII, DL, get(HiOpc), DestSub1)
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