Searched refs:FrameReg (Results 1 - 25 of 63) sorted by relevance

123

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16RegisterInfo.cpp97 Register FrameReg; local
100 FrameReg = Mips::SP;
104 FrameReg = Mips::S0;
108 FrameReg = MI.getOperand(OpNo+2).getReg();
110 FrameReg = Mips::SP;
131 !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
137 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
141 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
H A DMipsSERegisterInfo.cpp178 unsigned FrameReg; local
182 FrameReg = ABI.GetStackPtr();
185 FrameReg = ABI.GetBasePtr();
187 FrameReg = getFrameRegister(MF);
189 FrameReg = ABI.GetStackPtr();
191 FrameReg = getFrameRegister(MF);
230 .addReg(FrameReg)
233 FrameReg = Reg;
247 BuildMI(MBB, II, DL, TII.get(ABI.GetPtrAdduOp()), Reg).addReg(FrameReg)
250 FrameReg
[all...]
H A DMipsSEFrameLowering.h31 Register &FrameReg) const override;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600FrameLowering.cpp22 Register &FrameReg) const {
27 // Fill in FrameReg output argument.
28 FrameReg = RI->getFrameRegister(MF);
H A DR600FrameLowering.h28 Register &FrameReg) const override;
H A DSIFrameLowering.h35 Register &FrameReg) const override;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.cpp98 unsigned FIOperandNum, int Offset, Register FrameReg) {
102 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false);
117 Register FrameReg; local
119 Offset = TFI->getFrameIndexReference(MF, FrameIndex, FrameReg);
123 replaceFI(MF, II, MI, dl, FIOperandNum, Offset, FrameReg);
96 replaceFI(MachineFunction &MF, MachineBasicBlock::iterator II, MachineInstr &MI, const DebugLoc &dl, unsigned FIOperandNum, int Offset, Register FrameReg) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFRegisterInfo.cpp80 Register FrameReg = getFrameRegister(MF);
88 MI.getOperand(i).ChangeToRegister(FrameReg, false);
111 .addReg(FrameReg);
119 MI.getOperand(i).ChangeToRegister(FrameReg, false);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXFrameLowering.h28 Register &FrameReg) const override;
H A DNVPTXFrameLowering.cpp68 Register &FrameReg) const {
70 FrameReg = NVPTX::VRDepot;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.h45 Register &FrameReg) const override;
47 Register &FrameReg, bool PreferFP,
51 bool isSVE, Register &FrameReg,
93 Register &FrameReg,
H A DAArch64RegisterInfo.cpp604 Register FrameReg;
610 TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg,
614 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);
630 FrameReg = MI.getOperand(3).getReg();
643 MF, FrameIndex, FrameReg, /*PreferFP=*/false, /*ForSimm=*/true);
646 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset,
656 FrameReg = AArch64::SP;
661 MF, FrameIndex, FrameReg, /*PreferFP=*/false, /*ForSimm=*/true);
665 if (rewriteAArch64FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))
675 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offse
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumbRegisterInfo.cpp360 Register FrameReg, int &Offset,
376 emitThumbRegPlusImmediate(MBB, II, dl, DestReg, FrameReg, Offset, TII,
386 unsigned NumBits = (FrameReg == ARM::SP) ? 8 : 5;
399 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
405 if (NewOpc != Opcode && FrameReg != ARM::SP)
465 Register FrameReg;
468 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj);
475 if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){
487 MI.getOperand(FIOperandNum). ChangeToRegister(FrameReg, false /*isDef*/);
495 if (rewriteFrameIndex(MI, FIOperandNum, FrameReg, Offse
[all...]
H A DARMFrameLowering.h51 Register &FrameReg) const override;
53 Register &FrameReg, int SPAdj) const;
H A DThumbRegisterInfo.h50 Register FrameReg, int &Offset,
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.cpp153 Register FrameReg = getFrameRegister(MF); local
156 FrameReg = getBaseRegister();
158 FrameReg = Lanai::SP;
194 // Reg = FrameReg OP Reg
199 .addReg(FrameReg)
217 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, /*isDef=*/false);
235 .addReg(FrameReg)
239 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, /*isDef=*/false);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCRegisterInfo.cpp40 unsigned FrameReg, int Offset, int StackSize,
46 unsigned BaseReg = FrameReg;
69 << " for FrameReg=" << printReg(FrameReg, TRI)
77 .addReg(FrameReg)
117 .addReg(FrameReg)
188 Register FrameReg = getFrameRegister(MF); local
189 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);
38 ReplaceFrameIndex(MachineBasicBlock::iterator II, const ARCInstrInfo &TII, unsigned Reg, unsigned FrameReg, int Offset, int StackSize, int ObjSize, RegScavenger *RS, int SPAdj) argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.cpp176 Register FrameReg; local
178 Offset = TFI->getFrameIndexReference(MF, FrameIndex, FrameReg);
190 .addReg(FrameReg).addImm(0).addReg(SrcEvenReg);
191 replaceFI(MF, *StMI, *StMI, dl, 0, Offset, FrameReg);
202 .addReg(FrameReg).addImm(0);
203 replaceFI(MF, *LdMI, *LdMI, dl, 1, Offset, FrameReg);
211 replaceFI(MF, II, MI, dl, FIOperandNum, Offset, FrameReg);
H A DSparcFrameLowering.h42 Register &FrameReg) const override;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp63 unsigned Reg, unsigned FrameReg, int Offset ) {
71 .addReg(FrameReg)
78 .addReg(FrameReg)
84 .addReg(FrameReg)
94 unsigned Reg, unsigned FrameReg,
107 .addReg(FrameReg)
114 .addReg(FrameReg)
120 .addReg(FrameReg)
281 Register FrameReg = getFrameRegister(MF); local
285 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, fals
61 InsertFPImmInst(MachineBasicBlock::iterator II, const XCoreInstrInfo &TII, unsigned Reg, unsigned FrameReg, int Offset ) argument
92 InsertFPConstInst(MachineBasicBlock::iterator II, const XCoreInstrInfo &TII, unsigned Reg, unsigned FrameReg, int Offset, RegScavenger *RS ) argument
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetFrameLowering.h299 /// returned directly, and the base register is returned via FrameReg.
301 Register &FrameReg) const;
305 /// FrameReg. This is generally used for emitting statepoint or EH tables that
310 Register &FrameReg,
313 return getFrameIndexReference(MF, FI, FrameReg);
323 Register FrameReg; local
324 return getFrameIndexReference(MF, FI, FrameReg);
309 getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, Register &FrameReg, bool IgnoreSPUpdates) const argument
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.cpp154 Register FrameReg; local
156 getFrameLowering(MF)->getFrameIndexReference(MF, FrameIndex, FrameReg) +
170 // Modify Offset and FrameReg appropriately
174 .addReg(FrameReg)
177 FrameReg = ScratchReg;
182 .ChangeToRegister(FrameReg, false, false, FrameRegIsKill);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetFrameLoweringImpl.cpp42 /// (in output arg FrameReg). This is the default implementation which
46 Register &FrameReg) const {
53 FrameReg = RI->getFrameRegister(MF);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.h51 Register &FrameReg) const override;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86WinCOFFTargetStreamer.cpp273 unsigned FrameReg = 0; member in struct:__anon4410::FPOStateMachine
321 assert((StackAlign == 0 || FrameReg != 0) &&
325 if (FrameReg) {
326 // CFA is FrameReg + FrameRegOff.
327 FuncOS << CFAVar << ' ' << printFPOReg(MRI, FrameReg) << ' ' << FrameRegOff
422 FSM.FrameReg = Inst.RegOrOffset;
433 if (FSM.FrameReg)

Completed in 271 milliseconds

123