Searched refs:ExtReg (Results 1 - 9 of 9) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.cpp126 Register ExtReg; variable
140 ExtReg = MIB.getReg(0);
142 ExtReg = extendRegister(ValVReg, VA);
144 MIRBuilder.buildCopy(PhysReg, ExtReg);
150 Register ExtReg = extendRegister(ValVReg, VA); variable
155 MIRBuilder.buildStore(ExtReg, Addr, *MMO);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp55 Register ExtReg; variable
59 ExtReg = MIRBuilder.buildAnyExt(LLT::scalar(32), ValVReg).getReg(0);
61 ExtReg = extendRegister(ValVReg, VA);
70 {MRI.getType(ExtReg)}, false)
71 .addReg(ExtReg);
72 ExtReg = ToSGPR.getReg(0);
75 MIRBuilder.buildCopy(PhysReg, ExtReg);
H A DAMDGPUInstructionSelector.cpp1907 Register ExtReg = MRI->createVirtualRegister(&AMDGPU::SReg_64RegClass); local
1912 BuildMI(MBB, I, DL, TII.get(AMDGPU::REG_SEQUENCE), ExtReg)
1919 .addReg(ExtReg)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp120 Register ExtReg = extendRegister(ValVReg, VA); variable
121 MIRBuilder.buildCopy(PhysReg, ExtReg);
130 Register ExtReg = extendRegister(ValVReg, VA); variable
134 MIRBuilder.buildStore(ExtReg, Addr, *MMO);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp251 Register ExtReg = extendRegister(ValVReg, VA); local
252 MIRBuilder.buildCopy(PhysReg, ExtReg);
285 Register ExtReg = extendRegister(ValVReg, VA); local
286 MIRBuilder.buildStore(ExtReg, Addr, *MMO);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp936 unsigned ExtReg = createResultReg(&PPC::GPRCRegClass); local
937 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt))
939 SrcReg1 = ExtReg;
942 unsigned ExtReg = createResultReg(&PPC::GPRCRegClass); local
943 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt))
945 SrcReg2 = ExtReg;
H A DPPCISelLowering.cpp11419 Register ExtReg = RegInfo.createVirtualRegister(&PPC::GPRCRegClass); local
11421 ExtReg).addReg(dest);
11423 .addReg(incr).addReg(ExtReg);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp173 Register ExtReg = extendRegister(ValVReg, VA); variable
174 MIRBuilder.buildCopy(PhysReg, ExtReg);
H A DAArch64InstructionSelector.cpp5160 Register ExtReg = moveScalarRegClass(OffsetInst->getOperand(1).getReg(),
5164 // Base is LHS, offset is ExtReg.
5166 [=](MachineInstrBuilder &MIB) { MIB.addUse(ExtReg); },
5461 Register ExtReg;
5488 ExtReg = ExtDef->getOperand(1).getReg();
5494 ExtReg = RootDef->getOperand(1).getReg();
5500 if (Ext == AArch64_AM::UXTW && MRI.getType(ExtReg).getSizeInBits() == 32) {
5501 MachineInstr *ExtInst = MRI.getVRegDef(ExtReg);
5507 // We require a GPR32 here. Narrow the ExtReg if needed using a subregister
5510 ExtReg
[all...]

Completed in 238 milliseconds